ATA8742 ATMEL Corporation, ATA8742 Datasheet - Page 56

• Manufacturer Part Number: ATA8742
• Manufacturer: ATMEL Corporation

16.0.3
56
ATA8742
Power-on Reset
Figure 16-1. Reset Logic
A Power-on Reset (POR) pulse is generated by an On-chip detection circuit. The detection level
is defined in
ever V
as well as to detect a failure in supply voltage.
A Power-on Reset (POR) circuit ensures that the device is reset from Power-on. Reaching the
Power-on Reset threshold voltage invokes the delay counter, which determines how long the
device is kept in RESET after V
when V
Figure 16-2. MCU Start-up, RESET Tied to V
INTERNAL
V
TIME-OUT
BODLEVEL [1..0]
CC
CC
CC
RESET
RESET
is below the detection level. The POR circuit can be used to trigger the Start-up Reset,
decreases below the detection level.
V
“System and Reset Characterizations” on page
CCRR
Pull-up Resistor
FILTER
SPIKE
V
V
V
RST
PORMA X
PORMIN
CC
t
TOUT
CKSEL[1:0]
rise. The RESET signal is activated again, without any delay,
Power-on Reset
Reset Circuit
SUT[1:0]
Brown-out
Watchdog
Oscillator
Generator
Circuit
Clock
CK
CC
Register (MCUSR)
MCU Status
DATA BUS
Delay Counters
198. The POR is activated when-
TIMEOUT
9151A–INDCO–07/09