MAX5876 Maxim Integrated Products, MAX5876 Datasheet - Page 13

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MAX5876

Manufacturer Part Number
MAX5876
Description
Dual DAC with LVDS Inputs
Manufacturer
Maxim Integrated Products
Datasheet
Figure 4 displays the timing relationship between digital
LVDS data, clock, and output signals. The MAX5876
features a 2.0ns hold, a -1.2ns setup, and a 1.1ns prop-
agation delay time. A nine (eight)-clock-cycle latency
exists between CLKP/CLKN and OUTIP/OUTIN
(OUTQP/OUTQN).
The MAX5876 latches B11P/N–B0P/N, XORP/N, and
SELIQP/N data on the rising edge of the clock. A logic-
high signal on SELIQP and a logic-low signal on
SELIQN directs data onto the I-DAC inputs. A logic-low
signal on SELIQP and a logic-high signal on SELIQN
directs data onto the Q-DAC inputs.
The MAX5876 features LVDS receivers on the bus input
interface with internal 110Ω termination resistors. See
Figure 4. Timing Diagram
CLKP-CLKN
SELIQP
SELIQN
DATA
OUTQ
12-Bit, 250Msps, High-Dynamic-Performance,
OUTI
IN
(B11P/B11N–B0P/B0N, XORP, XORN,
Q0 - 6
I0 - 6
LVDS-Compatible Digital Inputs
______________________________________________________________________________________
Data Timing Relationship
t
S
I0
t
PD
t
H
SELIQP, SELIQN)
Q0 - 5
I0 - 5
Q0
Dual DAC with LVDS Inputs
I1
Figure 5. XORP and XORN are not internally terminated.
These LVDS inputs (B11P/N–B0P/N) allow for a low differ-
ential voltage swing with low constant power consump-
tion. A 1.25V common-mode level and 250mV differential
input swing can be applied to the B11P/N–B0P/N,
XORP/N, and SELIQP/N inputs.
The MAX5876 includes LVDS-compatible exclusive-OR
inputs (XORP, XORN). Input data (all bits) is compared
with the bits applied to XORP and XORN through exclu-
sive-OR gates. Setting XORP high and XORN low inverts
the input data. Setting XORP low and XORN high leaves
the input data noninverted. By applying a previously
encoded pseudo-random bit stream to the data input
and applying decoding to XORP/XORN, the digital input
data can be decorrelated from the DAC output, allowing
for the troubleshooting of possible spurious or harmonic
distortion degradation due to digital feedthrough on the
PC board. If XOR functionality is not required, connect
XORP to GND and XORN to DV
Q1
Q0 - 4
I0 - 4
I2
Q2
I0 - 3
Q0 - 3
DD1.8
.
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I3
Q0 - 2
I0 - 2
Q3
13

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