MAX5876 Maxim Integrated Products, MAX5876 Datasheet - Page 16

• Manufacturer Part Number: MAX5876
• Description: Dual DAC with LVDS Inputs
• Manufacturer: Maxim Integrated Products

tantalum or electrolytic capacitors. Ferrite beads with
additional decoupling capacitors forming a pi-network
could also improve performance.
The analog and digital power-supply inputs AV
AV
ply voltage range. The analog and digital power-supply
inputs AV
supply voltage range.
The MAX5876 is packaged in a 68-pin QFN-EP pack-
age, providing greater design flexibility, and optimized
DAC AC performance. The EP enables the use of nec-
essary grounding techniques to ensure highest perfor-
mance operation. Thermal efficiency is not the key
factor, since the MAX5876 features low-power opera-
tion. The exposed pad ensures a minimum inductance
ground connection between the DAC and the PC
board’s ground layer.
The data converter die attaches to an EP lead frame with
the back of this frame exposed at the package bottom
surface, facing the PC board side of the package. This
allows for a solid attachment of the package to the PC
board with standard infrared reflow (IR) soldering tech-
niques. A specially created land pattern on the PC board,
matching the size of the EP (6mm x 6mm), ensures the
proper attachment and grounding of the DAC (refer to the
MAX5878 EV kit data sheet). Designing vias into the land
area and implementing large ground planes in the PC
board design allow for the highest performance operation
of the DAC. Use an array of at least 4 x 4 vias (≤0.3mm
diameter per via hole and 1.2mm pitch between via
holes) for this 68-pin QFN-EP package. Connect the
MAX5876 exposed paddle to GND. Vias connect the
land pattern to internal or external copper planes to
12-Bit, 250Msps, High-Dynamic-Performance,
Dual DAC with LVDS Inputs
Figure 8. Differential Output Configuration
16
DATA11–DATA0
CLK
______________________________________________________________________________________
, and DV
12
DD1.8
DD3.3
and DV
MAX5876
GND
allow a +3.135V to +3.465V sup-
DD1.8
OUTIP/OUTQP
OUTIN/OUTQN
allow a +1.71V to +1.89V
25Ω
50Ω
25Ω
DD3.3
OUTP
OUTN
,
spread heat. Use as many vias as possible to the ground
plane to minimize inductance.
Integral nonlinearity is the deviation of the values on an
actual transfer function from either a best straight-line fit
(closest approximation to the actual transfer curve) or a
line drawn between the end points of the transfer func-
tion, once offset and gain errors have been nullified.
For a DAC, the deviations are measured at every indi-
vidual step.
Differential nonlinearity is the difference between an
actual step height and the ideal value of 1 LSB. A DNL
error specification of less than 1 LSB guarantees a
monotonic transfer function.
The offset error is the difference between the ideal and
the actual offset current. For a DAC, the offset point is
the average value at the output for the two midscale
digital input codes with respect to the full scale of the
DAC. This error affects all codes by the same amount.
A gain error is the difference between the ideal and the
actual full-scale output voltage on the transfer curve,
Figure 9. Recommended Power-Supply Decoupling and
Bypassing Circuitry
Static Performance Parameter Definitions
*BYPASS EACH POWER-SUPPLY PIN INDIVIDUALLY.
BYPASSING—DAC LEVEL
DATA11–DATA0
12
AV
DV
DD1.8
DD1.8
Differential Nonlinearity (DNL)
0.1µF
0.1µF
AV
DV
MAX5876
DD3.3
DD3.3
Integral Nonlinearity (INL)
0.1µF
0.1µF
AV
CLK
OUTIP/OUTQP
OUTIN/OUTQN
0.1µF
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Offset Error
Gain Error