KSZ8041 Hynix Semiconductor, KSZ8041 Datasheet - Page 12

• Manufacturer Part Number: KSZ8041
• Manufacturer: Hynix Semiconductor

Rev. 0.04 /Jul. 2006
MODE REGISTER SET (MRS)
The mode register is used to store the various operating modes such as /CAS latency, addressing mode, burst length,
burst type, test mode, DLL reset. The mode register is programed via MRS command. This command is issued by the
low signals of /RAS, /CAS, /CS, /WE and BA0. This command can be issued only when all banks are in idle state and
CKE must be high at least one cycle before the Mode Register Set Command can be issued. Two cycles are required to
write the data in mode register. During the MRS cycle, any command cannot be issued. Once mode register field is
determined, the information will be held until reset by another MRS command.
A12~A9 A8
BA0
BA1
0
1
0
0
0
0
-
MRS Type
BA0
EMRS
MRS
0
0
1
0
-
A7 A6~A0
0
0
1
-
A11
Valid
Valid
VS
-
A10
Operating Mode
A6
Normal Operation/ Reset DLL
0
0
0
0
1
1
1
1
Vendor specific Test Mode
All other states reserved
A9
A5
Operating Mode
Normal Operation
0
0
1
1
0
0
1
1
A4
0
1
0
1
0
1
0
1
A8
CAS Latency
Reserved
Reserved
Reserved
A7
1.5
2.5
2
3
4
A6
CAS Latency
A2
0
0
0
0
1
1
1
1
A5
A1
0
0
1
1
0
0
1
1
A4
HY5DU281622FT(P) Series
A0
0
1
0
1
0
1
0
1
A3
Sequential
BT
A3
0
1
Reserved
Reserved
Reserved
Reserved
Reserved
2
4
8
Burst Length
Burst Type
Sequential
Interleave
A2
Burst Length
Interleave
A1
Reserved
Reserved
Reserved
Reserved
Reserved
2
4
8
A0
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