XC3000 Xilinx Corp., XC3000 Datasheet - Page 40
XC3000
Manufacturer Part Number
XC3000
Description
XC3000 Field Programmable Gate Array
Manufacturer
Xilinx Corp.
Datasheet
1.XC3000.pdf
(76 pages)
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XC3000 Series Field Programmable Gate Arrays
XC3000A Absolute Maximum Ratings
Note:
XC3000A Global Buffer Switching Characteristics Guidelines
Note:
7-42
Global and Alternate Clock Distribution
Either: Normal IOB input pad through clock buffer
Or: Fast (CMOS only) input pad through clock
TBUF driving a Horizontal Longline (L.L.)
BIDI
I to L.L. while T is Low (buffer active)
T to L.L. active and valid with single pull-up resistor
T to L.L. active and valid with pair of pull-up resistors
T to L.L. High with single pull-up resistor
T to L.L. High with pair of pull-up resistors
Symbol
T
T
to any CLB or IOB clock input
Bidirectional buffer delay
V
V
V
STG
T
SOL
CC
TS
IN
1. Timing is based on the XC3042A, for other devices see timing calculator.
J
Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are
stress ratings only, and functional operation of the device at these or any other conditions beyond those listed under
Recommended Operating Conditions is not implied. Exposure to Absolute Maximum Ratings conditions for extended
periods of time may affect device reliability.
buffer to any CLB or IOB clock input
Supply voltage relative to GND
Input voltage with respect to GND
Voltage applied to 3-state output
Storage temperature (ambient)
Maximum soldering temperature (10 s @ 1/16 in.)
Junction temperature plastic
Junction temperature ceramic
Description
1
1
Description
Speed Grade
Symbol
T
T
T
T
T
T
T
T
PIDC
PUS
PUF
BIDI
PID
ON
ON
IO
Max
11.0
16.0
10.0
7.5
6.0
4.5
9.0
1.7
-7
November 9, 1998 (Version 3.1)
–0.5 to V
–0.5 to V
–0.5 to +7.0
–65 to +150
+260
+125
+150
Max
10.0
14.0
7.0
5.7
4.0
8.0
8.0
1.5
-6
CC
CC
+0.5
+0.5
Units
Units
ns
ns
ns
ns
ns
ns
ns
ns
V
V
V
C
C
C
C
R
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