MT90210 Zarlink Semiconductor, MT90210 Datasheet - Page 14
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MT90210
Manufacturer Part Number
MT90210
Description
3072 Channels TDM to Dual Port RAM Multiple Rate Parallel Bus Access Circuit (MRPAC)
Manufacturer
Zarlink Semiconductor
Datasheet
1.MT90210.pdf
(25 pages)
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PCLK Cycle
13 to 16
29 to 32
10
11
12
17
18
19
20
21
22
23
24
25
26
27
28
1
2
3
4
5
6
7
8
9
Table 3 - Functional Example of the Read and Write Operation (Mode 3)
Read
rd
rd
rd
rd
rd
rd
rd
rd
rd
rd
rd
rd
-
-
-
-
-
-
-
-
-
-
-
-
Write
wr
wr
wr
wr
wr
wr
wr
wr
wr
wr
wr
wr
-
-
-
-
-
-
-
-
-
-
-
-
Channel
126
126
126
126
126
126
126
126
126
126
126
126
INACTIVE
INACTIVE
0
0
0
0
0
0
0
0
0
0
0
0
Stream
10
11
10
11
0
1
2
3
4
5
6
7
8
9
0
1
2
3
4
5
6
7
8
9
Memory Address
MT90210
0DECh
0DEDh
0DEAh
0DEBh
0DEEh
0DEFh
0DE8h
0DE9h
0DF0h
0DF1h
0DF2h
0DF3h
100Ah
100Bh
1000h
1001h
1002h
1003h
1004h
1005h
1006h
1007h
1008h
1009h
2-157
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