MT90210 Zarlink Semiconductor, MT90210 Datasheet - Page 22

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MT90210

Manufacturer Part Number
MT90210
Description
3072 Channels TDM to Dual Port RAM Multiple Rate Parallel Bus Access Circuit (MRPAC)
Manufacturer
Zarlink Semiconductor
Datasheet
† DC Electrical Characteristics are over recommended operating conditions unless otherwise stated.
* Typical figures are at 25
AC Electrical Characteristics
10 Frame Pulse Hold (ST-BUS)
11 Frame pulse width in modes 1,2,3
12 Frame pulse width in modes 4,5
13 S0-23 delay from active to High-Z
14 S0-23 delay from High-Z to active
15 S0-23 Delay (high and low)
16 S0-23 Set-up Time
17 S0-23 Hold Time
18 CKout output delay from SCLK
1
2
3
4
5
6
7
8
9
SCLK, C16 Period
SCLK, C16 Pulse Width High
SCLK, C16 Pulse Width Low
SCLK rise/fall time
HC4 hold related to C16
HC4 period
HC4 pulse low
HC4 pulse high
Frame Pulse Setup (ST-BUS)
from CLK falling (ST-BUS mode)
before CLK rising (ST-BUS mode)
from CLK rising (ST-BUS mode)
2.048 Mb/s, 4.096 Mb/s, 8.192 Mb/s
2.048 Mb/s, 4.096 Mb/s, 8.192 Mb/s
2.048 Mb/s, 4.096 Mb/s, 8.192 Mb/s
Characteristics
8.192 Mb/s (16.384 MHz)
°
2.048 Mb/s (4.096 MHz)
4.096 Mb/s (8.192 MHz)
C and are for design aid only.
2.048 Mb/s
4.096 Mb/s
8.192 Mb/s
2.048 Mb/s
4.096 Mb/s
8.192 Mb/s
2.048 Mb/s
4.096 Mb/s
8.192 Mb/s
t
Sym
t
t
t
t
t
hclkh
t
t
t
t
t
hclkl
t
clkh
hclk
t
t
hfrw
stod
t
t
t
clkl
stis
stih
dpll
t
frw
clk
frh
ch
frs
az
za
T
Min
10
10
0
0
Typ*
244
122
122
122
244
122
122
244
122
244
60
60
30
60
30
60
3
Max
30
30
30
5
5
Units
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
R
R
R
L
L
L
=1K, C
=1K, C
=1K, C
Test Conditions
MT90210
L
L
L
=200pF
=200pF
=200pF
2-165

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