MT90210 Zarlink Semiconductor, MT90210 Datasheet - Page 9

• Manufacturer Part Number: MT90210
• Description: 3072 Channels TDM to Dual Port RAM Multiple Rate Parallel Bus Access Circuit (MRPAC)
• Manufacturer: Zarlink Semiconductor

MT90210
2-152
SCLK
(4 MHz)
SCLK
(8 MHz)
SCLK, C16
(16 MHz)
F0i
Serial I/O
2 Mb/s
Serial I/O
4 Mb/s
Serial I/O
8 Mb/s
W
R
T
E
R
E
A
D
I
A0-A12
P0-P7
WBC
A0-A12
P0-P7
WBC
Ch. 127,
Ch. 31, Bit 1
Bit 5
Ch. 63, Bit 2
last write address
last read address
Ch. 127,
Bit 4
MT90210 finishes reading
MT90210 finishes writing
Data
Data
Out
In
of frame n
of frame n
data from frame n.
data from frame n.
Ch. 127,
Bit 3
Figure 7a - WBC and RBC Output Transition
Ch. 63, Bit 1
Figure 6 - Serial Port Functional Timing
Ch. 127,
Bit 2
address x
address y
Ch. 31, Bit 0
Frame Boundary Established by F0i
Data
Data
Ch. 127,
Bit 1
Out
In
Ch. 63, Bit 0
Ch. 127,
Bit 0
inactive
inactive
Ch. 0,
transactions related to frame n +1.
Bit 7
MT90210 will handle parallel por
Ch. 0, Bit 7
transactions related to frame n +1.
inactive
inactive
MT90210 will handle parallel port
Ch. 0,
Bit 6
Ch. 0, Bit 7
Ch. 0,
Bit 5
Ch. 0, Bit 6
Ch. 0,
Bit 4
t
Ch. 0,
Bit 3
Ch. 0, Bit 5
Ch. 0, Bit 6
Ch. 0,
Bit 2