MT9041 Zarlink Semiconductor, MT9041 Datasheet - Page 12
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MT9041
Manufacturer Part Number
MT9041
Description
Single Reference Frequency Selectable Digital PLL With Multiple Clock Outputs For T1/E1 Trunk And Backplane Synchronization
Manufacturer
Zarlink Semiconductor
Datasheet
1.MT9041.pdf
(23 pages)
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Multiple E1 Reference Sources with MT9041B
In this example 8 E1 link framers (MT9074) are connected to a common system backplane clock using the
MT9041B. Each of the extracted clocks E1.5o go to a mux which selects one of the eight input clocks as the
reference to the MT9041B. The clock choice is made by a controller using the loss of signal pin LOS from the
MT9074s to qualify potential references. In the event of loss of signal by one of the framers, an interrupt signals the
controller to choose a different reference clock. Disturbances in the generated system backplane clocks C4b and
F0b are minimized by the phase slope limitations of the MT9041B PLL. This ensures system integrity and
minimizes the effect of clock switchover on downstream trunks.
TTIP
TRING
RTIP
RRING
TTIP
TRING
RTIP
RRING
MT9074
MT9074
E1.5o
E1.5o
LOS
LOS
C4b
C4b
F0i
F0i
Figure 9 - Multiple E1 Reference Sources with MT9041B
To Controller
Interrupt
To Controller
Zarlink Semiconductor Inc.
Interrupt
MT9041B
12
IN0
IN1
IN2
IN3
IN4
IN5
IN6
IN7
1 TO 8
MUX
OUT
10nF
REF
C4o
1kΩ
F0o
RST
10kΩ
MT9041B
OSCi
FS1
FS2
+ 5V
MS
+ 5V
20MHz
20MHz
Out
CLOCK
Data Sheet
±
32ppm