MPC5534 Frescale, MPC5534 Datasheet - Page 20

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MPC5534

Manufacturer Part Number
MPC5534
Description
Microcontroller
Manufacturer
Frescale
Datasheet

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MPC5534 Memory Map
Peripheral blocks may be redundantly mapped. The customer must use the MMU to prevent corruption.
4.1
When the MPC5534 MCU acts as a slave from an external master device, the External Bus Interface (EBI)
translates the 24-bit external address to a 32-bit internal address.
NOTES:
1
2
20
NOTES:
1
2
0xFFFC_C000 - 0xFFFF_BFFF
0xFFFC_0000 - 0xFFFC_3FFF
0xFFFC_4000 - 0xFFFC_7FFF
0xFFFC_8000 - 0xFFFC_BFFF
0xFFFF_C000 - 0xFFFF_FFFF
0xFFF9_C000 - 0xFFF9_FFFF
0xFFFB_0000 - 0xFFFB_3FFF
0xFFFB_4000 - 0xFFFB_7FFF
0xFFFB_8000 - 0xFFFB_FFFF
0xFFF5_0000 - 0xFFF7_FFFF
0xFFF9_8000 - 0xFFF9_BFFF
0xFFFA_0000 - 0xFFFA_FFFF
0xFFF8_0000 - 0xFFF8_3FFF
0xFFF8_4000 - 0xFFF9_3FFF
0xFFF9_4000 - 0xFFF9_7FFF
If allocated size > used size, then the base address for the block is the lowest address of the listed address range, unless
noted otherwise.
It is recommneded that the address rage of 0x3000_0000 through 0x3FFF_FFFF be reserved for use by the calibration bus.
Ext addr[8:11]
Only the lower 24 address signals (addr[8:31]) are available off-chip.
Reserved for a future block that requires its own crossbar slave port.
0b1100
0b1101
0b1110
0b1111
0b0xxx
0b10xx
External Master Mode Operation Memory Map
1
Table 3. External to Internal Memory Map Translation Table for Slave Mode
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0b0100_0000_0000
0b0110_0000_0000
0b1100_0011_1111
0b1111_1111_1111
Internal addr[0:11]
0b0000_0000_00xx
N/A
MPC5534 Microcontroller Product Brief, Rev. 0.0
192 K
192 K
16 K
64 K
16 K
16 K
16 K
64 K
16 K
16 K
32 K
16 K
16 K
16 K
16 K
Table 2. MPC5534 Memory Map
(bytes)
Size
8 M
4 M
1 M
1 M
1 M
1 M
1152
1152
1152
200
200
200
N/A
164
N/A
N/A
N/A
N/A
4 K
44
44
Bridge A Peripherals
Bridge B Peripherals
Internal Slave
Internal Flash
Reserved
Enhanced Queued Analog to Digital Converter (eQADC)
SRAM
N/A
Deserial Serial Peripheral Interface (DSPI_B)
Deserial Serial Peripheral Interface (DSPI_C)
Deserial Serial Peripheral Interface (DSPI_D)
Serial Communications Interface (SCI_A)
Serial Communications Interface (SCI_B)
2
Controller Area Network (FlexCAN_A)
Controller Area Network (FlexCAN_C)
Table 3
Boot Assist Module (BAM)
lists the translation parameters.
N/A - Reserved for off-chip access
0xC3F0_0000 - 0xC3FF_FFFF
0xFFF0_0000 - 0xFFFF_FFFF
0x0000_0000 - 0x003F_FFFF
0x4000_0000 - 0x400F_FFFF
0x6000_0000 - 0x600F_FFFF
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Internal Address Range
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