MPC5534 Frescale, MPC5534 Datasheet - Page 25

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MPC5534

Manufacturer Part Number
MPC5534
Description
Microcontroller
Manufacturer
Frescale
Datasheet

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pins of the MCU. The reset controller performs reset monitoring of internal and external reset sources, and
drives the RSTOUT pin. The SIU is accessed by the e200z3 core through the crossbar switch.
For more information on configuring the MPC5534 at reset see
page
5.9
The MPC5534 provides 1 Mbyte of programmable, non-volatile, Flash memory. The non-volatile memory
(NVM) can be used for instruction and/or data storage. The Flash module interfaces the system bus to a
dedicated Flash memory array controller. It supports a 64-bit data bus width at the system bus port, and a
128-bit read data interface to Flash memory. The module contains a four-entry, 128-bit prefetch buffer and
a prefetch controller which prefetches sequential lines of data from the Flash array into the buffer. Prefetch
buffer hits allow no-wait responses. Normal Flash array accesses are registered and are forwarded to the
system bus on the following cycle, incurring three wait-states. Prefetch operations may be automatically
controlled, and may be restricted to servicing a single bus master. Prefetches may also be restricted to being
triggered for instruction or data accesses.
5.10 SRAM
The MPC5534 SRAM module provides a general-purpose 64-Kbyte memory block. The first 32K block
of the SRAM is powered by its own power supply pin, called VSTBY. This allows the contents of this
memory region to be preserved when the rest of the MCU is powered down.
ECC handling is done on a 32-bit boundary and is completely software compatible with MPC5500 family
devices with an e200z6 core and 64-bit wide ECC syndrome. Because the e200z3 core in MPC5534 is a
cacheless processor, the platform RAM is organized on a 32-bit boundary versus the 64-bit organization
used on other MPC5500 family MCUs based on the e200z6 core.
5.11 BAM
The BAM is a block of read-only memory that is hard-coded by Freescale and is identical for all MPC5500
family MCU’s with an e200 core. The BAM program is executed every time the MCU is powered-on or
reset in normal mode. The BAM supports three different modes of booting. They are:
The BAM also reads the reset configuration half word (RCHW) from Flash memory (either internal or
external) and configures the MPC5534 hardware accordingly.
For more information on configuring the MPC5534 at reset see
page
Freescale Semiconductor
30.
30.
Booting from internal Flash memory
Single Master Booting from external memory (for parts in 324 BGA and 416 BGA package that
have an external bus)
Serial boot loading (a program is downloaded into RAM via eSCI or the FlexCAN and then
executed)
On-chip Flash
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MPC5534 Microcontroller Product Brief, Rev. 0.0
Section 6, “Chip Configuration,” on
Section 6, “Chip Configuration,” on
Detailed Features
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