MPC8323E Freescale Semiconductor, MPC8323E Datasheet - Page 43
MPC8323E
Manufacturer Part Number
MPC8323E
Description
Integrated Communications Processor Family Hardware Specifications
Manufacturer
Freescale Semiconductor
Datasheet
1.MPC8323E.pdf
(80 pages)
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Figure 35
Figure 36
generally reference the rising edge of the clock, these AC timing diagrams also apply when the falling edge
is the active edge.
Figure 36
Figure 37
19 HDLC, BISYNC, Transparent, and Synchronous
This section describes the DC and AC electrical specifications for the high level data link control (HDLC),
BISYNC, transparent, and synchronous UART of the MPC8323E.
Freescale Semiconductor
MPC8323E PowerQUICC™ II Pro Integrated Communications Processor Family Hardware Specifications, Rev. 0
UTOPIACLK (Output)
UART
UTOPIACLK (Input)
provides the AC test load for the UTOPIA.
and
shows the UTOPIA timing with external clock.
shows the UTOPIA timing with internal clock.
Output Signals:
Output Signals:
Input Signals:
Input Signals:
Figure 37
UTOPIA
UTOPIA
UTOPIA
UTOPIA
Output
represent the AC timing from
Figure 36. UTOPIA AC Timing (External Clock) Diagram
Figure 37. UTOPIA AC Timing (Internal Clock) Diagram
t
UEIVKH
t
UIIVKH
Figure 35. UTOPIA AC Test Load
Z
0
= 50 Ω
t
UEKHOX
t
UIKHOX
t
UIIXKH
t
UEKHOV
t
UEIXKH
t
UIKHOV
Table
49. Note that although the specifications
HDLC, BISYNC, Transparent, and Synchronous UART
R
L
= 50 Ω
OV
DD
/2
43