MD3331-D64-V3 M-Systems Inc., MD3331-D64-V3 Datasheet - Page 44

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MD3331-D64-V3

Manufacturer Part Number
MD3331-D64-V3
Description
Diskonchip Millennium Plus
Manufacturer
M-Systems Inc.
Datasheet

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DiskOnChip Millennium Plus 16/32/64MByte
8.3.3 Using DiskOnChip Millennium Plus in Asynchronous Boot Mode
Platforms that host CPUs that wake up in burst mode should use Asynchronous Boot mode when using DiskOnChip
Millennium Plus as the system boot device.
During platform initialization, certain CPUs wake up in 32-bit mode and issue instruction fetch cycles continuously.
XScale CPUs, for example, initiate a 16-bit read cycle, but after the first word is read, continue to hold CE# and
OE# asserted while it increments the address and reads additional data as a burst. StrongARM CPUs wake up in
32-bit mode and issue double-word instruction fetch cycles.
Since DiskOnChip Millennium Plus derives its internal clock signal from the CE#, OE# and WE# inputs, it cannot
distinguish between these burst cycles. To support this type of access, DiskOnChip Millennium Plus needs to be set
to Asynchronous Boot mode.
To set DiskOnChip Millennium Plus to Asynchronous Boot mode, set the byte RAM MODE SELECT to 8FH. This
can be done through the format utility of DiskOnChip Millennium Plus or by customizing the IPL code. For more
information on the format utility, refer to the DiskOnChip Software Utilities user manual or the TrueFFS Software
Development Kit (SDK) developer guide. For further details on customizing IPL code, refer to application note AP-
DOC-044, Writing an IPL for DiskOnChip Millennium Plus 16MB.
Once in Asynchronous Boot mode, the CPU can fetch its instruction cycles from the DiskOnChip Millennium Plus
Programmable Boot Block. After reading from this block and completing boot, DiskOnChip Millennium Plus
returns to derive its internal clock signal from the CE#, OE# and WE# inputs. Please refer to Section 10.4 for read
timing specifications for Asynchronous Boot mode.
Note: Only 16MB devices support Asynchronous Boot mode.
44
Data Sheet, Rev. 1.7
93-SR-002-03-8L

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