T15C1 ACER, T15C1 Datasheet - Page 13

• Manufacturer Part Number: T15C1
• Description: COLOR TFT LCD MODULE
• Manufacturer: ACER

6. INTERFACE TIMING
6.1 INPUT SIGNAL TIMING SPECIFICATIONS
DCLK signal
(Clock)
DCLK-Data
Timing
ENAB
signal
The input signal timing specifications are shown as the following table and timing diagram.
Note (1) Because this module is operated by DE only mode, Hsync and Vsync input signals should be set
Note (2) The duration of DE signal must be longer than 1 clock period at every horizontal sync. period.
Data enable timing
H
V
to low logic level or ground. Otherwise, this module would operate abnormally.
Item
Period
Frequency
Duty
High time
Low time
Rise time
Fall time
Setup time
Hold time
Period
Frequency
Display period
Period
Frequency
Display period
Symbol
Tch/Tc
TclkH
TclkL
Thold
Tclkr
Tclkf
1/Tv
Tset
Thd
Tdn
Tvd
Th
Tc
Tv
fc
fh
25.000
25.000
Min.
46.6
670
640
776
768
13 / 13
5.0
5.0
4.5
6.5
40
60
–
–
0
30.764
32.505
48.3
Typ.
672
640
806
768
50
60
–
–
–
–
–
–
0
40.000
40.000
1566
Max.
48.3
640
806
768
5.0
5.0
60
75
–
–
–
–
0
clock
clock
clock
MHz
Unit
kHz
Hz
Th
Th
ns
ns
ns
ns
ns
ns
ns
%
Issued Date:Dec.8’2000
fc=1/Tc
40MHz
40MHz
Model No.: M150X1
Remark
Approval
Version 2.0