MT9173AE Mitel Networks Corporation, MT9173AE Datasheet - Page 3

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MT9173AE

Manufacturer Part Number
MT9173AE
Description
Digital Subscriber Interface Circuit with RxSB
Manufacturer
Mitel Networks Corporation
Datasheet

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Preliminary Information
Pin Description (continued)
24
15
16
17
19
20
18
21
22
23
24
Pin #
1,6,
18,
20,
28
17
19
21
22
23
25
24
26
27
28
F0o/RCK Frame Pulse Out/Receive Bit Rate Clock output (Digital). In DN mode a 244 ns
L
C4/TCK
Precan
OUT
OSC2
OSC1
TEST
Name
V
NC
L
DD
IN
DIS L
wide negative pulse indicating the end of the active channel times of the device to
allow daisy chaining. In MOD mode provides the receive bit rate clock to the system.
Data Clock/Transmit Baud Rate Clock (Digital). A 4.096 MHz TTL compatible clock
input for the MASTER and output for the SLAVE in DN mode. For MOD mode this pin
provides the transmit bit rate clock to the system.
Oscillator Output. CMOS Output.
Oscillator Input. CMOS Input. D.C. couple signals to this pin. Refer to D.C. Electrical
Characteristics for OSC1 input requirements.
Precanceller Disable. When held to Logic ’1’
precanceller is forced to V
the L
pulldown (50 k ) is provided on this pin.
No Connection. Leave open circuit
logic “0”, L
Test Pin.
Receive Signal input (Analog).
Positive Power Supply (+5V) input.
OUT
OUT
Disable. When held to logic “1”, L
to the precanceller path is enabled and functions normally. An internal
OUT
Connect to V
functions normally. An internal pulldown (50 k ) is provided on this pin.
SS
Bias
.
thus bypassing the precanceller section. When logic ’0’,
Description
OUT
is disabled (i.e., output = V
,
the internal path from L
MT9173/74
Bias
OUT
). When
to the
9-139

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