MT9V403 Micron, MT9V403 Datasheet - Page 24
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MT9V403
Manufacturer Part Number
MT9V403
Description
1/2-INCH VGA (WITH FREEZE-FRAME) CMOS ACTIVE-PIXEL DIGITAL IMAGE SENSOR
Manufacturer
Micron
Datasheet
1.MT9V403.pdf
(33 pages)
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NOTE:
09005aef80c07280
MT9V403_DS.fm - Rev. B 1/04 EN
1. VLN1, VLP, VOFF, VREF, VREF1, VLN2, and VREF2 are generated on-chip, but user may disable internal bias (via two-
2. All bias pins should be decoupled with 0.1µF ceramic and 10µF electrolytic capacitors. (Please see board connections.)
3. Digital outputs can drive standard CMOS circuits with 30pF load, but less load capacitance results in less substrate
wire serial interface) and apply external voltages to sensor. VREF1DRV is generated on chip but its internal bias can-
not be disabled. VRST_PIX and VRSTLOW are not generated internally and external voltages must be applied.
Capacitors should be placed as physically close as possible to the MT9V403 package.
noise on-chip. This is recommended to minimize load capacitance for better noise performance.
Analog +3.3V
Analog +3.3V
Analog +3.3V
Analog +3.3V
1k
1k
1k
1k
Controller
Interface
Digital +3.3V
1.5k
0.1µF
0.1µF
0.1µF
0.1µF
0.1µF
10µF
10µF
10µF
10µF
10µF
39
32
37
29
31
38
30
33
26
25
24
17
19
8
9
14
7
SDATA
FRAME_SYNC_N
SYSCLK
EXPOSE
ROW_VALID/LD_SHFT_N
SCLK
FRAME_VALID/ROW_STRT
LRST_N
PG_N
TX
RESMEM
VLN1
VLP
VREF1DRV
VREF1
VTEST1
VREF2
Figure 29: Board Connections
1/2-INCH VGA (WITH FREEZE-FRAME) CMOS
Digital Ground
ACTIVE-PIXEL DIGITAL IMAGE SENSOR
24
Analog Ground
Micron Technology, Inc., reserves the right to change products or specifications without notice.
VLN2
VRST_PIX
VREF
VOFF
VRSTLOW
VLNS
DATA0 3
DATA1 2
DATA2 1
DATA3 48
DATA4 47
DATA5 46
DATA6 42
DATA7 45
DATA8 40
DATA9 41
10µF
10µF
10µF
10µF
10µF
10µF
21
20
16
13
23
18
0.1µF
0.1µF
0.1µF
0.1µF
0.1µF
0.1µF
Output
Pixel
Data
Analog +3.3V
1k
Analog +3.3V
1k
Analog +3.3V
1k
Analog +3.3V
1k
Analog +3.3V
1k
Analog +3.3V
1k
©2004 Micron Technology. Inc.