MT9V403 Micron, MT9V403 Datasheet - Page 7

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MT9V403

Manufacturer Part Number
MT9V403
Description
1/2-INCH VGA (WITH FREEZE-FRAME) CMOS ACTIVE-PIXEL DIGITAL IMAGE SENSOR
Manufacturer
Micron
Datasheet

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0
Sequential Master Mode
followed by readout. The frame synchronization wave-
NOTE:
Snapshot Mode
ger signal that initiates exposure, which is immediately
followed by readout. The interface signals utilized in
snapshot mode are depicted in Figure 9. In snapshot
mode the start of the integration period is determined
by the externally applied EXPOSE pulse that the user
inputs to the MT9V403. The integration time is prepro-
grammed via the two-wire interface. After each frame's
integration period is complete, the readout process
commences and the FRAME_VALID, ROW_ VALID, and
DATA signals are output.
image or a sequence of images. The frame rate is con-
trolled only by changing the period of the user sup-
plied EXPOSE pulse train. The frame synchronization
waveforms for snapshot mode are shown in Figure 9.
Insertion of horizontal blanking periods (specified via
09005aef80c07280
MT9V403_DS.fm - Rev. B 1/04 EN
In sequential master mode the exposure period is
Vertical blanking is nominally 1 SYSCLK and 0 row times, and may be increased by using register 6.
In snapshot mode the sensor accepts an input trig-
Snapshot mode can be used to capture a single
Figure 8: Sequential Master Mode Frame Synchronization Waveforms
FRAME_VALID
FRAME_VALID
ROW_VALID
ROW_VALID
Figure 10: Snapshot Mode Frame Synchronization Waveforms
DATA [9:0]
DATA [9:0]
*
(output)
(output)
(output)
Row_Valid goes HIGH after (2.5 + (column start -1)) clocks + 1 row time
EXPOSE
(output)
(output)
(output)
(output)
(input)
EXPOSE
Exposure Time
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1/2-INCH VGA (WITH FREEZE-FRAME) CMOS
Row
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Row
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Row
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2
Row
2
ACTIVE-PIXEL DIGITAL IMAGE SENSOR
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Row
478
Row
forms for sequential master mode are shown in
Figure 8.
478
the two-wire serial interface register) during readout is
allowed, but the user controls the vertical blanking by
controlling the input EXPOSE pulse.
Row
479
Row
Figure 9: Snapshot Mode Interface
479
CONTROLLER
Row
Micron Technology, Inc., reserves the right to change products or specifications without notice.
480
Row
480
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Vertical Blanking
Row
Row
1
1
Signals
Row
FRAME_VALID
ROW_VALID
2
Row
2
EXPOSE
SYSCLK
LRST_N
DATA
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Row
478
Row
478
Row
479
Row
479
Row
480
©2004 Micron Technology. Inc.
Row
480
MT9V4O3
XXX
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