BR24L16 Rohm, BR24L16 Datasheet
BR24L16
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BR24L16 Summary of contents
Page 1
... Terminal voltage 1 Degradation is done at 8.0mW/ C for operation above Degradation is done at 4.5mW/ C for operation above Degradation is done at 3.0mW/ C for operation above Degradation is done at 3.1mW/ C for operation above 25 C. BR24L16-W / BR24L16F-W / BR24L16FJ-W / BR24L16FV-W / BR24L16FVM-W Limits Unit 0.3 to 6.5 V 800 (DIP8) 1 ...
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... V OL2 Input leakage current I LI Output leakage current CC1 Operating current I CC2 Standby current I SB This product is not designed for protection against radioactive rays. BR24L16-W / BR24L16F-W / BR24L16FJ-W / BR24L16FV-W / BR24L16FVM-W Limits Unit 1 Min. Typ. Max. Unit 0. 0. ...
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... Fig.1(a) PHYSICAL DIMENSION (Units : mm) DIP8 (BR24L16-W) 4.9 0 1.27 0.42 0.1 Fig.1(c) PHYSICAL DIMENSION (Units : mm) SOP-J8 (BR24L16FJ-W) 2.9 0 0.475 0.05 0.22 0.04 0.65 0.08 S Fig.1(e) PHYSICAL DIMENSION (Units : mm) MSOP8 (BR24L16FVM-W) BR24L16-W / BR24L16F-W / BR24L16FJ-W / BR24L16FV-W / BR24L16FVM-W 7. Fig.1(b) PHYSICAL DIMENSION (Units : mm) 0.2 0.1 0.1 Fig.1(d) PHYSICAL DIMENSION (Units : mm) 0.05 0.145 0.03 0.08 M 5.0 0 0.15 0.1 0.1 1.27 0.4 0.1 SOP8 (BR24L16F-W) 3.0 0.2 8 ...
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... Serial clock input Slave and word address, SDA IN / OUT serial data input, serial data output WP IN Write protect input 1 An open drain output requires a pull-up resistor. BR24L16-W / BR24L16F-W / BR24L16FJ-W / BR24L16FV-W / BR24L16FVM-W 16kbit EEPROM array Slave word 11bits address register START STOP Control logic ...
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... Output data delay time Output data hold time Stop condition setup time Bus free time Write cycle time Noise spike width (SDA and SCL) WP hold time WP setup time WP high period 1 Not 100% tested. BR24L16-W / BR24L16F-W / BR24L16FJ-W / BR24L16FV-W / BR24L16FVM-W Fast-mode 2.5V Vcc 5.5V Symbol Min. Typ. Max. ...
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... SCL t : STA SU SDA SDA data is latched into the chip at the rising edge of SCL clock. Output data toggles at the falling edge of SCL clock. Write cycle timing SCL SDA D0 WRITE DATA (n) BR24L16-W / BR24L16F-W / BR24L16FJ-W / BR24L16FV-W / BR24L16FVM DAT t SU LOW t PD ...
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... See Fig.6 ( During this period, WRITE operation is canceled by setting WP “HIGH”. ( See Fig.6 ( the case of setting WP “HIGH” during t address is not guaranteed. Please write correct data again in the case. BR24L16-W / BR24L16F-W / BR24L16FJ-W / BR24L16FV-W / BR24L16FVM-W DATA (n) Fig.6(a) WP TIMING OF THE WRITE OPERATION DATA (n) ...
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... When WP pin set level), write protect is set for 2,048 words (all address). CC When WP pin set to GND (L level), enable to write 2,048 words (all address). Either control this pin or connect to GND (or V BR24L16-W / BR24L16F-W / BR24L16FJ-W / BR24L16FV-W / BR24L16FVM inhibited from being left unconnected. ...
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... Fig.7 ACKNOWLEDGE RESPONSE FROM RECEIVER) START CONDITION (START BIT) SCL (From COM) SDA ( COM OUTPUT DATA) SDA (IC OUTPUT DATA) Fig.7 ACKNOWLEDGE RESPONSE FROM RECEIVER BR24L16-W / BR24L16F-W / BR24L16FJ-W / BR24L16FV-W / BR24L16FVM Acknowledge Signal (ACK Signal) 9/25 ...
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... The seven higher order bits of the address (P2 to P0, WA7 to WA4) remain constant. If the master transmits more than sixteen words, prior to generating the STOP condition, the address counter will “roll over”, and the previous transmitted data will be overwritten. BR24L16-W / BR24L16F-W / BR24L16FJ-W / BR24L16FV-W / BR24L16FVM-W W ...
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... Note Acknowledge is detected with “Low” level, not “High” level, command will become Sequential Read. So the device transmits the next data, Read is not terminated. In the case of terminating Read, input Acknowledge with “High” always, then input stop condition. BR24L16-W / BR24L16F-W / BR24L16FJ-W / BR24L16FV-W / BR24L16FVM-W R ...
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... Note Acknowledge is detected with “Low” level, not “High” level, command will become Sequential Read. So the device transmits the next data, Read is not terminated. In the case of terminating Read, input Acknowledge with “High” always, then input stop condition. BR24L16-W / BR24L16F-W / BR24L16FJ-W / BR24L16FV-W / BR24L16FVM-W DATA(n) ...
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... SLAVE C WORD C SDA A ADDRESS K ADDRESS cancellation invalid period WP BR24L16-W / BR24L16F-W / BR24L16FJ-W / BR24L16FV-W / BR24L16FVM-W , WRITE operation is stopped in the middle and the data ACK cancellation effective period No data will be written Fig.13 WP EFFECTIVE TIMING ...
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... If the master controls the SDA line HIGH, it will conflict with the device output LOW then it makes a current overload. It may cause instantaneous power down and may damage the device. SCL 1 SDA Fig.14-(a) DUMMY CLOCK START SCL SDA SCL 1 SDA COMMAND starts with start condition. BR24L16-W / BR24L16F-W / BR24L16FJ-W / BR24L16FV-W / BR24L16FVM-W by pull up resistor ). CC DUMMY CLOCK 14 START START DUMMY CLOCK ...
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... After the device returns the ACK, continue word address input or data output respectively. THE FIRST WRITE COMMAND WRITE COMMAND SLAVE C A ADDRESS Fig.15 SUCCESSIVE WRITE OPERATION BY ACKNOWLEDGE POLLING BR24L16-W / BR24L16F-W / BR24L16FJ-W / BR24L16FV-W / BR24L16FVM-W =5ms SLAVE ADDRESS THE SECOND WRITE COMMAND S A ...
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... Current Read, internal address counter is not confirmed. Therefore operation of Current Read after this in not valid. Operate a Random Read in this case. SCL SDA Fig.16 COMMAND CANCELLATION BY START AND STOP CONDITION DURING THE INPUT OF SLAVE ADDRESS BR24L16-W / BR24L16F-W / BR24L16FJ-W / BR24L16FV-W / BR24L16FVM START ...
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... SCL "H" and SDA "L" B) Unable to keep condition 2. After power becomes stable, execute software reset. (See page14 ) C) Unable to keep condition 1 and 2. Follow the instruction A first, then the instruction B. BR24L16-W / BR24L16F-W / BR24L16FJ-W / BR24L16FV-W / BR24L16FVM Vbot for the function of P.O.R. during power up. ...
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... PU IL Examples : When According to 2 0 300 [k ] BR24L16-W / BR24L16F-W / BR24L16FJ-W / BR24L16FV-W / BR24L16FVM-W and the capacitance of bus line (CBUS) must be less than T PU must be enough higher than input HIGH level of a controller and the device, . MICRO COMPUTER 0.7V ...
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... SDA line. OLMAX ). CC 3mA, the V of the controller and the EEPROM 0 867 [ ] V 0.4[ 0 0.9[V] is met BR24L16 / FVM-W BR24L08 / FVM-W BR24L04 / FVM-W 0. with pull up resister GND. CC A0, A1 19/25 ...
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... PMOS of controller to NMOS of EEPROM. R also protects SDA pin from surges. Therefore SCL SDA "H" OUTPUT OF CONTROLLER BR24L16-W / BR24L16F-W / BR24L16FJ-W / BR24L16FV-W / BR24L16FVM-W GND V CC capacitor 10 to 100 F 2 CBUS. But, in the case that Tri-state CMOS interface is between SDA pin of the device and a pull up resister able to be used though SDA port is open drain ...
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... The current overload may cause noise on the power line and instantaneous power down. The following conditions must be met, where is the maximum permissible current. The maximum permissible current depends on V EEPROM. MAXIMUM CURRENT "H" OUTPUT CONTROLLER BR24L16-W / BR24L16F-W / BR24L16FJ-W / BR24L16FV-W / BR24L16FVM-W and the capacitance of bus line (CBUS ) of SDA must be less than ...
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... DATA AAh 1 0 SUPPLY VOLTAGE : V (V) CC Fig.23 Write operating current 400kHz) CC SCL BR24L16-W / BR24L16F-W / BR24L16FJ-W / BR24L16FV-W / BR24L16FVM SPEC SUPPLY VOLTAGE : V (V) CC Fig.18 Low input voltage V ...
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... SPEC2 : STANDARD-MODE 3 2 SPEC1 SUPPLY VOLTAGE : V (V) CC Fig.32 Start condition setup time t SU:STA BR24L16-W / BR24L16F-W / BR24L16FJ-W / BR24L16FV-W / BR24L16FVM-W 2.5 SPEC 2 1 SUPPLY VOLTAGE : V (V) CC Fig.27 Standby current I ...
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... SPEC1 SUPPLY VOLTAGE : V (V) CC Fig.41 Stop condition setup time t SU:STO BR24L16-W / BR24L16F-W / BR24L16FJ-W / BR24L16FV-W / BR24L16FVM-W 300 SPEC2 200 SPEC1 : FAST-MODE SPEC2 : STANDARD-MODE SPEC1 100 100 200 ...
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... SPEC1 : FAST-MODE SPEC2 : STANDARD-MODE 0 0.2 0.1 SPEC1 SUPPLY VOLTAGE : V (V) CC Fig.47 Noise spike width t (SDA L) I BR24L16-W / BR24L16F-W / BR24L16FJ-W / BR24L16FV-W / BR24L16FVM-W 0.6 SPEC1 : FAST-MODE SPEC2 : STANDARD-MODE 0.5 0 0.1 SPEC1 SUPPLY VOLTAGE : V (V) CC Fig ...
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... Any data, including, but not limited to application circuit diagrams information, described herein are intended only as illustrations of such devices and not as the specifications for such devices. ROHM CO.,LTD. disclaims any warranty that any use of such devices shall be free from infringement of any ...