BR24L16 Rohm, BR24L16 Datasheet - Page 10
BR24L16
Manufacturer Part Number
BR24L16
Description
2k8 bit electrically erasable PROM
Manufacturer
Rohm
Datasheet
1.BR24L16.pdf
(26 pages)
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Memory ICs
Byte write
Page write
By using this command, the data is programed into the indicated word address.
When the master generates a STOP condition, the device begins the internal write cycle to the nonvolatile memory
This device is capable of sixteen byte Page Write operation.
When two or more byte data are inputted, the four low order address bits are internally incremented by one after the
If the master transmits more than sixteen words, prior to generating the STOP condition, the address counter will
array.
receipt of each word. The seven higher order bits of the address (P2 to P0, WA7 to WA4) remain constant.
“roll over”, and the previous transmitted data will be overwritten.
LINE
WP
SDA
LINE
WP
SDA
R
S
T
A
T
1 0
S
A
R
T
T
ADDRESS
1
SLAVE
1 0
0
P2
ADDRESS
P1
1
SLAVE
P0
0
W
W
R
R
P2
T
E
I
/
BR24L16-W / BR24L16F-W / BR24L16FJ-W /
C
A
K
P1
WA
7
P0
Fig.9 PAGE WRITE CYCLE TIMING
Fig.8 BYTE WRITE CYCLE TIMING
ADDRESS (n)
W
W
R
R
T
E
I
/
WORD
A
C
K
WA
7
ADDRESS
WA
0
WORD
BR24L16FV-W / BR24L16FVM-W
C
A
K
D7
DATA (n)
WA
0
C
A
K
D7
D0
C
A
K
DATA
DATA (n+7)
D0
A
C
K
D0
O
S
T
P
A
C
K
O
S
T
P
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