BR24L16 Rohm, BR24L16 Datasheet - Page 8

• Manufacturer Part Number: BR24L16
• Description: 2k8 bit electrically erasable PROM
• Manufacturer: Rohm

Memory ICs
1) Start condition (Recognition of start bit)
2) Stop condition (Recognition of stop bit)
3) Notice about write command
4) Device addressing
5) Write protect (WP)
Device operation
All commands are proceeded by the start condition, which is a HIGH to LOW transition of SDA when SCL is HIGH.
The device continuously monitors the SDA and SCL lines for the start condition and will not respond to any command
All communications must be terminated by a stop condition, which is a LOW to HIGH transition of SDA when SCL is
In the case that stop condition is not excuted in WRITE mode, transfered data will not be written in a memory.
Following a START condition, the master output the slave address to be accessed.
The most significant four bits of the slave address are the “device type indentifier”, for this device it is fixed as “1010”.
The next three bit (P2, P1, P0) are used by the master to select eight 256 word page of memory.
The last bit of the stream (R/W - - - READ / WRITE) determines the operation to be performed. When set to “1”, a read
until this condition has been met. (See Fig.4 SYNCHRONOUS DATA TIMING)
HIGH. (See Fig.4 SYNCHRONOUS DATA TIMING)
operation is selected ; when set to “0”, a write operation is selected.
When WP pin set to V
When WP pin set to GND (L level), enable to write 2,048 words (all address).
Either control this pin or connect to GND (or V
R / W set to “0” - - - - - - WRITE (including word address input of Random Read)
R / W set to “1” - - - - - - READ
1010
P2, P1, P0 set to ‘0’ ‘0’ ‘0’ - - - - - 1 page (000 to 0FF)
P2, P1, P0 set to ‘0’ ‘0’ ‘1’ - - - - - 2 page (100 to 1FF)
P2, P1, P0 set to ‘1’ ‘1’ ‘1’ - - - - - 8 page (700 to 7FF)
P2
CC
(H level), write protect is set for 2,048 words (all address).
P1
BR24L16-W / BR24L16F-W / BR24L16FJ-W /
P0
CC
). It is inhibited from being left unconnected.
R / W
BR24L16FV-W / BR24L16FVM-W
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