PM7312 pmc-sierra, PM7312 Datasheet - Page 137

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PM7312

Manufacturer Part Number
PM7312
Description
Freedm 32a1024l Assp Telecom Standard Datasheet
Manufacturer
pmc-sierra
Datasheet

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Proprietary and Confidential to PMC-Sierra, Inc., and for its customers’ internal use.
Document No.: PMC-2021833, Issue 2
CRC[1:0]
PROV
The CRC algorithm (CRC[1:0]) configures the HDLC processor to perform CRC generation on
the outgoing HDLC data stream. The value of CRC[1:0] to be written to the channel provision
RAM, in an indirect channel write operation, must be set up in this register before triggering the
write. CRC[1:0] is ignored when DELIN is low. CRC[1:0] reflects the value written until the
completion of a subsequent indirect channel read operation.
Table 17 CRC[1:0] Settings
The indirect provision enable bit (PROV) reports the channel provision enable flag read from
the channel provision RAM after an indirect channel read operation has completed. The
provision enable flag to be written to the channel provision RAM, in an indirect write
operation, must be set up in this register before triggering the write. When PROV is set high,
the HDLC processor will service requests for data from the TCAS-12 block. When PROV is
set low, the HDLC processor will ignore requests from the TCAS-12 block. PROV reflects the
value written until the completion of a subsequent indirect channel read operation.
CRC[1]
0
0
1
1
CRC[0]
0
1
0
1
Operation
No CRC
CRC-CCITT
CRC-32
Reserved
FREEDM 32A1024L ASSP Telecom Standard Product Data Sheet
Released
137

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