SST49LF016C SST, SST49LF016C Datasheet - Page 17

• Manufacturer Part Number: SST49LF016C
• Description: 16 Mbit LPC Serial Flash
• Manufacturer: SST

16 Mbit LPC Serial Flash
SST49LF016C
Read-Array Command
Upon initial device power-up and after exit from reset, the
device defaults to the read array mode. This operation can
also be initiated by writing the Read-Array command. (See
Table 8.) The device remains available for array reads until
another command is written. Once an internal Program/
Erase operation starts, the device will not recognize the
Read-Array command until the operation is completed,
unless the operation is suspended via a Program/Erase
Suspend command.
Read-Software-ID Command
The Read-Software-ID operation is initiated by writing the
Read-Software-ID command. Following the command, the
device will output the manufacturer’s ID and device ID from
the addresses shown in Table 9. Any other valid command
will terminate the Read-Software-ID operation.
The Read-Software-ID command is the same as the Read-
Security-ID command. See “Security ID Commands” on
page 19.
TABLE 10: Software Status Register
©2006 Silicon Storage Technology, Inc.
2:5
Bit
0
1
6
7
Name
RES
BPS
RES
ESS
WSMS
Function
Reserved for future use
Block Protect Status
The Block Write-Lock bit should be interrogated only after Erase or Program command is issued.
It informs the system whether or not the selected block is locked.
BPS does not provide a continuous indication of Write-Lock bit value.
0: Block Unlocked
1: Operation Aborted, Block Write-Lock bit set.
Reserved for future use
Erase Suspend Status
0: Erase in progress/completed
1: Erase suspended
Write State Machine Status
Check WSMS to determine erase or program completion.
0: Busy
1: Ready
17
TABLE 9: Product Identification
Read-Status-Register Command
The Status register may be read to determine when a Sec-
tor-/Block-Erase or Program completes, and whether the
operation completed successfully. The Status register may
be read at any time by writing the Read-Status-Register
command. After writing this command, all subsequent
Read operations will return data from the Status register
until another valid command is written.
The default value of the Status register after device power-
up or reset is 80H.
Clear-Status-Register Command
The user can reset the Status register’s Block Protect Sta-
tus (BPS) bit to 0 by issuing a Clear-Status-Register com-
mand. Device power-up and hardware reset will also reset
BPS to 0.
Manufacturer’s ID
Device ID
1. Address shown in this column is for boot device only.
SST49LF016C
Address locations should appear elsewhere in the 4
GByte system memory map depending on ID strapping
values on ID[3:0] pins when multiple LPC memory
devices are used in a system.
FFFC 0000H
FFFC 0001H
Address
S71237-07-000
1
Data Sheet
T10.0 1237
T9.1 1237
Data
BFH
5CH
9/06