ISL6219 Intersil Corporation, ISL6219 Datasheet - Page 13

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ISL6219

Manufacturer Part Number
ISL6219
Description
Microprocessor CORE Voltage Regulator Precision Multi-Phase BUCK PWM Controller for Mobile Applications
Manufacturer
Intersil Corporation
Datasheet

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through the upper MOSFET across VIN. The power
dissipated as a result is P
Finally, the resistive part of the upper MOSFET’s is given in
Equation 12 as P
In this case, of course, r
upper MOSFET.
The total power dissipated by the upper MOSFET at full load
can now be approximated as the summation of the results
from Equations 9, 10, 11 and 12. Since the power equations
depend on MOSFET parameters, choosing the correct
MOSFETs can be an iterative process that involves
repetitively solving the loss equations for different MOSFETs
and different switching frequencies until converging upon the
best solution.
Current Sensing
Pins 23, 20 and 19 are the ISEN pins denoted ISEN1, ISEN2
and ISEN3 respectively. The resistors connected between
these pins and the phase nodes determine the gains in the
load-line regulation loop and the channel-current balance
loop. Select the values for these resistors based on the room
temperature r
operating current, I
according to Equation 13 (see also Figure 4).
In certain circumstances, it may be necessary to adjust the
value of one or more of the ISEN resistors. This can arise
when the components of one or more channels are inhibited
from dissipating their heat so that the affected channels run
hotter than desired (see the section entitled Channel-Current
Balance). In these cases, chose new, smaller values of R
for the affected phases. Choose R
desired decrease in temperature rise in order to cause
proportionally less current to flow in the hotter phase.
In Equation 14, make sure that ∆T
rise above the ambient temperature, and ∆T
temperature rise above the ambient temperature. While a
single adjustment according to Equation 14 is usually
sufficient, it may occasionally be necessary to adjust R
two or more times to achieve perfect thermal balance
between all channels.
DS(ON)
P
R
R
UP 4 ,
UP,4
ISEN
ISEN 2 ,
P
FL
UP 3 ,
; and the number of phases, N
=
of the lower MOSFETs; the full-load
.
=
r
DS(ON)
=
=
DS ON
---------------------- -
50 10
r
UP,3
DS ON
V
R
(
IN
×
ISEN
(
13
Q
)
and is simply
rr
is the on resistance of the
6
)
2
f
∆T
----------
∆T
I
----- -
N
ISEN,2
I
------- -
S
M
FL
N
is the desired temperature
2
1
2
d
+
in proportion to the
I
--------- -
PP
12
1
2
is the measured
(EQ. 11)
(EQ. 12)
(EQ. 13)
(EQ. 14)
ISEN
ISEN
Load-Line Regulation Resistor
The load-line regulation resistor is labeled R
Its value depends on the desired full-load droop voltage
(V
ISEN resistor, the load-line regulation resistor is as shown
in Equation 15.
If one or more of the ISEN resistors was adjusted for thermal
balance as in Equation 14, the load-line regulation resistor
should be selected according to Equation16 where I
full-load operating current and R
connected to the n
Compensation
The two opposing goals of compensating the voltage
regulator are stability and speed. Depending on whether the
regulator employs the optional load-line regulation as
described in Load-Line Regulation, there are two distinct
methods for achieving these goals.
COMPENSATING A LOAD-LINE REGULATED
CONVERTER
The load-line regulated converter behaves in a similar
manner to a peak-current mode controller because the two
poles at the output-filter L-C resonant frequency split with
the introduction of current information into the control loop.
The final location of these poles is determined by the system
function, the gain of the current signal, and the value of the
compensation components, R
Since the system poles and zero are effected by the values
of the components that are meant to compensate them, the
solution to the system equation becomes fairly complicated.
Fortunately there is a simple approximation that comes very
close to an optimal solution. Treating the system as though it
were a voltage-mode regulator by compensating the L-C
poles and the ESR zero of the voltage-mode approximation
yields a solution that is always stable with very close to ideal
transient performance.
The feedback resistor, R
lined in Load-Line Regulation Resistor. Select a target band-
width for the compensated system, f
must be large enough to assure adequate transient perfor-
mance, but smaller than 1/3 of the per-channel switching fre-
quency. The values of the compensation components
depend on the relationships of f
and the ESR zero frequency. For each of the three cases
DROOP
in Figure 7). If Equation 13 is used to select each
R
FB
=
th
--------------------------------
I
FL
ISEN pin.
V
R
DROOP
r
FB
DS ON
FB
(
=
, has already been chosen as out-
V
------------------------ -
50 10
C
)
DROOP
0
and C
×
ISEN(n)
n
to the L-C pole frequency
R
ISEN n ( )
0
6
. The target bandwidth
C
.
is the ISEN resistor
FB
in Figure 7.
FL
(EQ. 15)
(EQ. 16)
is the

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