D75116GF NEC, D75116GF Datasheet - Page 28

• Manufacturer Part Number: D75116GF
• Description: Search -----> UPD75116GF
• Manufacturer: NEC

28
Table 8-1 Hardware Statuses after Reset
Serial
interface
Timer/ event
counter
(n = 0, 1)
Interrupt
Digital
port
Clock
generator,
clock
output
circuit
Program counter (PC)
PWS
Stack pointer (SP)
Data memory (RAM)
General registers (X, A, H, L, D, E, B, C)
Bank select registers (MBS, RBS)
Basic interval timer
Analog
port
Power-on flag (PONF)
Bit sequential buffers (BSB0 to BSB3)
PD75112(A), 75116(A)
* 1: Power-on reset ................... 1
2: Data at addresses 0F8H to 0FDH of the data memory becomes undefined due to RESET input.
RESET input in operation ... Undefined
Skip flag (SK0 to SK2)
Interrupt status flag (IST0, 1)
Bank enable flags (MBE, RBE)
Carry flag (CY)
Shift register (SIO)
Mode register (SIOM)
Processor clock control
register (PCC)
Clock output mode
register (CLOM)
Interrupt request flag (IRQ
Interrupt enable flag (IE
Priority select resister (IPS)
INT0, 1 mode resisters (IM0, IM1)
Output buffer
Output latch
Input/output mode registers
(PMGA, PMGB, PMGC)
PTH00 to PTH03 input latches
Mode register (PTHM)
Hardware
Counter (Tn)
Modulo register (TMODn)
Mode register (TMn)
TOEn, TOFn
Counter (BT)
Mode register (BTM)
)
)
Lower 6 bits of address 0000H of the program memory are set to
PC
Bits 6 and 7 of address 0000H of the program memory are set to
RBE and MBE, respectively.
13
to PC
8
and the content of address 0001H is set to PC
RESET Input in Standby Mode
Undefined
Undefined
Undefined
Reset (0)
Clear (0)
Hold *1
Hold
Hold
Hold
Hold
FFH
0, 0
0, 0
0, 0
Off
0
0
0
0
0
0
0
0
0
0
0
0
0
7
to PC
0
.
RESET Input in Power-On
Reset or Operation
1 or undefined *2
Undefined
Undefined
Undefined
Undefined
Undefined
Undefined
Undefined
same as left
same as left
Reset (0)
Clear (0)
FFH
0, 0
0, 0
0, 0
Off
0
0
0
0
0
0
0
0
0
0
0
0
0