D75116GF NEC, D75116GF Datasheet - Page 46

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D75116GF

Manufacturer Part Number
D75116GF
Description
Search -----> UPD75116GF
Manufacturer
NEC
Datasheet

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46
RESET Input Timing
Data Memory STOP Mode Low Supply Voltage Data Retention Characteristics
(Ta = –40 to +85 C)
PD75112(A), 75116(A)
RESET
Data retention supply voltage
Data retention supply current*1
Release signal set time
Oscillation stabilization
wait time*2
BTM3
* 1: Current for the on-chip pull-up resistor, power-on circuit
2: The oscillation stabilizing time is intended to stop the CPU
3: Depends on the following setting of the basic interval timer
(mask option) and comparator circuit is not included.
to prevent any unstable operation at the start of oscillation.
mode register (BTM).
Parameter
BTM2
0
0
1
1
BTM1
t
RSL
0
1
0
1
Symbol
V
V
t
t
SREL
WAIT
DDDR
DDDR
0.2 V
BTM0
0
1
1
1
V
Release by RESET
Release by interrupt request
DD
DDDR
= 2.0 V
Test Conditions
Wait Time
(f
2
2
2
2
20
17
15
13
XX
/f
/f
/f
/f
=4.19 MHz Valu´s in Parentheses)
XX
XX
XX
XX
(approx. 250 ms)
(approx. 31.3 ms)
(approx. 7.82 ms)
(approx. 1.95 ms)
MIN.
2.0
0
2
TYP.
0.1
17
*3
/f
X
MAX.
6.0
10
Unit
ms
ms
V
A
s

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