SL20T0081 System Logic Semiconductor, SL20T0081 Datasheet - Page 13

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SL20T0081

Manufacturer Part Number
SL20T0081
Description
SLS System Logic Semiconductor
Manufacturer
System Logic Semiconductor
Datasheet
SLS System Logic Semiconductor
FUNCTION DESCRIPTION
MICROPROCESSOR INTERFACE
Chip Select Input
CE2 is “H”. When these pins are set to any other combination, RS, RDB(E) and_WRB(RW) inputs are disabled and
D0to D7 are to be high impedance. And, in case of serial interface, the internal shift register and the counter are reset.
Parallel / Serial Interface
serial inter face is determined by PS pin.
Table 3. Parallel / Serial Interface Mode
Parallel Interface (PS = “H”)
Table 4. Microprocessor Selection for Parallel Interface
Table 5. Parallel Data Transfer
There are CE1 and CE2 pins for chip selection. The SL20T0081 can interface with an MPU only when CE1 is “L” and
SL20T0081 has three types of interface with an MPU, which are one serial and two parallel interfaces. This parallel or
The 8-bit bi-directional data bus is used in parallel interface and the type of MPU is selected by P68/80 as shown
in table 4. The type of data transfer is determined by signals at RS, RD(E) and WR(R/W) as shown in table 5.
P68/80
Common
H
L
RS
PS
H
H
L
L
H
L
CE1
CE1
CE1
RD
(E)
H
H
H
H
Parallel
6800-series
Serial
Type
CE2
CE2
CE2
(R/W)
WR
H
H
L
L
CE1
CE1
CE1
RS
RS
RS
RD
H
H
L
L
8080-series
RD(E)
RD
WR
E
CE2
CE2
CE2
H
H
L
L
WR(R/W)
R/W
WR
P68/80
Writes to internal register (instruction)
H
*
L
x
Display data read out
Register status read
D0 to D7
D0 to D7
D0 to D7
Display data write
Description
6800-series MPU mode
8080-series MPU mode
Interface mode
Serial-mode
SL20T0081
6800-series
8080-series
MPU bus
*
x :Don’t care

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