SL20T0081 System Logic Semiconductor, SL20T0081 Datasheet - Page 17

• Manufacturer Part Number: SL20T0081
• Description: SLS System Logic Semiconductor
• Manufacturer: System Logic Semiconductor

SLS System Logic Semiconductor
LCD DISPLAY CIRCUIT
Display Data RAM
can be selected when the page and column addresses are specified. The 81 row are divided into 10 pages of 8 lines
and the 11th page with a single line (D0 only). Data is read from or written to the 8 lines of each page directly through
D7 to D0. The display data of D7 to D0 from the microprocessor correspond to the LCD common lines as shown in
figure 6. The microprocessor can read from and write to RAM through the I/O buffer. Since the LCD controller
operates independently, data can be written into RAM at the same time as data is being displayed without causing the
LCD flicker.
Figure 6. Display Data RAM to LCD panel Data Transfer
Page Address Circuit
register changed by only the “Set Page” instruction. Page Address 11 is a special RAM area for the icons and display
dataD0 is only valid. When Page Address is above 8, it is impossible to access to Display Data RAM.
Line Address Circuit
by setting Line Address repeatedly, it is possible to realize the screen scrolling and page switching without changing
the contents of Display Data RAM as shown in figure 6. It incorporates 7-bit line address register changed by only the
initial display line instruction and 7-bit counter circuit. At the beginning of each LCD frame, the contents of register are
copied to the line counter which is increased by CL signal and generates the Line Address for transferring the 132-bit
RAM data to the display data latch circuit. However, display data of icons are not scrolled because the MPU can not
access Line Address of icons.
The Display Data RAM stores pixel data for the LCD. It is 81-row by 132-column addressable array. Each pixel
This circuit is for providing a Page Address to Display Data RAM show in figure 6. It incorporates 4-bit Page Address
This circuit assigns Display Data RAM a Line Address corresponding to the first line (COM0) of the display. Therefore,
DB0
DB1
DB2
DB3
DB4
0
1
0
0
1
0
0
0
1
0
Display Data RAM
1
0
1
0
0
1
0
0
0
1
1
0
0
1
1
0
0
1
0
0
COM0
COM1
COM2
COM3
COM4
LCD panel
SL20T0081