T4312816A Taiwan Memory Technology, T4312816A Datasheet - Page 19

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T4312816A

Manufacturer Part Number
T4312816A
Description
8M x 16 SDRAM
Manufacturer
Taiwan Memory Technology
Datasheet
tm
Page Write cycle at Different Bank @ Burst Length = 4
*Note : 1. To interrupt burst write by row precharge, DQM should be asserted to mask invalid input data.
TM Technology Inc. reserves the right
to change products or specifications without notice.
C L O C K
A 1 0 /A P
A D D R
C K E
R A S
C A S
D Q M
C S
B A
D Q
W E
2. To interrupt burst write by row precharge, both the write and the precharge banks must be the same.
0
R o w A c ti v e
( A - B a n k )
R A a
R A a
CH
TE
1
2
3
W r it e ( A -
B a n k )
C A a
D A a 0
4
R o w A c ti v e
( B - B a n k )
R B b
R B b
D A a 1
5
D A a 2
6
D A a 3
7
t
C D L
W r it e ( B -
D B b 0
C B b
B a n k )
H I G H
8
D B b 1
9
P.19
D B b 2
1 0
D B b 3
1 1
W r it e ( A -
B a n k )
D A c 0
C A c
1 2
D A c 1
Preliminary T4312816A
1 3
W r it e ( B -
C B d
D B d 0
B a n k )
1 4
D B d 1
Publication Date: APR. 2003
1 5
t
R D L
1 6
P r e c h a r g e
( A - B a n k )
* N o te 2
* N o te 1
1 7
1 8
Revision: 0.B
:D o n 't c a r e
1 9

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