T4312816A Taiwan Memory Technology, T4312816A Datasheet - Page 8

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T4312816A

Manufacturer Part Number
T4312816A
Description
8M x 16 SDRAM
Manufacturer
Taiwan Memory Technology
Datasheet
tm
AC CHARACTERISTICS
(AC opterating conditions unless otherwise noted)
Note:
TM Technology Inc. reserves the right
to change products or specifications without notice.
CLK cycle time
CLK to valid
Output delay
Output data hold time
CLK high pulse width
CLK low pulse width
Input setup time
Input hold time
CLK to output in Low-Z
CLK to output in
Hi-Z
2. If clock rising time is longer than 1ns,(tr/2-0.5)ns should be added to the parameter.
3. Assumed input rise and fall time (tr & tf)=1ns.
1. Parameters depend on programmed CAS latency.
If tr & tf is longer than 1ns,transient time compensation should be considered,
i.e.,[(tr+tf)/2-1]ns should be added to the parameter.
Parameter
CH
TE
CAS Latency = 3
CAS Latency = 2
CAS Latency = 3
CAS Latency = 2
CAS Latency = 3
CAS Latency = 2
Symbol
t
t
t
t
t
t
t
t
t
SAC
SHZ
SLZ
OH
CC
CH
CL
SH
SS
Min
1.5
6
8
2
2
2
1
1
-
-
-
-
-6
Max
1K
5.5
5.5
P.8
6
6
1.75
Min
2.5
2.5
2.5
7
9
1
1
-
-
-
-
-7
Max
1K 7.5 1K
6
6
6
6
1.75
Min
2.5
2.5
2.5
Preliminary T4312816A
9
-7.5
Max
6
6
1
1
6
6
Publication Date: APR. 2003
Min
2.5
10
8
3
3
2
1
1
-
-
-
-
-8
Max
1K
6
7
6
7
Min
2.5
2.5
10 1K
10
3
3
1
1
-
-
-
-
-10
Revision: 0.B
Max
7
9
7
9
Unit Note
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
1
1
2
3
3
3
3
2

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