STD0550 ST Microelectronics, Inc., STD0550 Datasheet - Page 10

• Manufacturer Part Number: STD0550
• Description: Matrix Display Digital TV Processor
• Manufacturer: ST Microelectronics, Inc.

STD0550
1.4
1.4.1
All sub-level blocks operate at the frequency used as a sampling frequency (f
embedded A/D converters. This free-running clock is called the system clock (f
an external clock generator from a video display/TV system.
Video Display/TV System, Master CPU Controller
General Description
The STD0550 includes a 32-bit ST20 CPU core with all peripherals required for controlling the TV
chassis. Teletext data is extracted from the incoming stream and decoded by the CPU. An
embedded On-Screen Display (OSD) generator delivers the text and graphics. The Video Display
Pipeline performs feature box image processing such as picture improvement, horizontal and
vertical rescaling and Temporal Noise Reduction.
Generation
CVBS1/Y
CVBS2/Y
C
Interface
R/Cr
G
B/Cb
FB
Analog
System
Stage
Clock
Input
I²C
and Monitoring Unit
Input
VBI Slicer
SRC
Synchronization
RGB Insertion
Figure 4: Architectural Block Diagram
Separator
Chroma
Luma
& Chroma Demodulator
Standard Identifier
Line-locked Output Pixel Clock
PAL/NTSC/SECAM
Format Converter
& Output Scaler
Video Correction
Output FIFO
Soft Mixer
General Description
S
S
) for the five
) and is provided by
YCrCb[7:0]
HSYNC
VSYNC
Field
Line-locked
Output Pixel
Clock
10/32