STD0550 ST Microelectronics, Inc., STD0550 Datasheet - Page 4

• Manufacturer Part Number: STD0550
• Description: Matrix Display Digital TV Processor
• Manufacturer: ST Microelectronics, Inc.

STD0550
1
1.1
Analog Audio
Digital Audio
Digital Audio
Transport
General Description
Introduction
The STD0550 is dedicated to iDTV, LCD and Matrix Display. Combined with an external audio
processor STV82x7, it provides cost effective high performance solution for LCD-iDTV applications
with resolution from VGA (640 x 480) up to WXGA (1366 x 768).
It includes an MPEG decoder system, with its slave controller. The Transport stream is
demultiplexed and demodulated. The front end interface supports a 2 slot DVB-CI interface.
The MPEG slave controller is a ST20, 32 bit CPU, it can access memory via the programmable
CPU interface (or EMI) or the shared memory interface (SMI or MPEG SDRAM interface) which is
shared with the video, audio and MPEG graphics.
PAL/SECAM/NTSC Analog video is demodulated and converted into digital video (4:2:2 YCrCb).
Digital video (from a digital or analog source) is sent to the Video display/TV system. Digital audio is
sent to the external Audio processor.
The video display/TV system is controlled by a Master 32 bit ST20 CPU. The video display system
includes field or line-up converter to support progressive display and all peripherals required for
controlling the TV chassis. Teletext data is extracted from the incoming stream and decoded by the
master CPU. An embedded On-Screen Display (OSD) generator delivers text and graphics. A video
display pipeline performs feature box image processing such as picture improvement, horizontal
and vertical rescaling and Temporal Noise Reduction.
The Master CPU system operates with an external SDRAM that is used for the field-rate up-
conversion, text and graphic generation.The external SDRAM can be configured as a single bank of
16/64/128 Mb (16-bit configuration) or a dual bank of 16 to 256 Mb (32-bit configuration).
Application program codes are stored in an external Flash Memory and executed from the SDRAM.
SDRAM
Stream
FLASH
Video
Analog
Video
1 S/PDIF
3 PCM
Slave Controller
Analog Video Decoder
and Digital Converter
Audio/Video
Digital Video
STV82x7
PAL/SECAM/NTSC
ST20 CPU
Decoder
Encoder
Multistandard
MPEG
Figure 1: STD0550 Block Diagram
Amplifier
D1: YCrCb
D1: YCrCb
Video/OSD Display
Master Controller
ST20 CPU
TV System
STD0550
R
G
B
H/V
DE
DLCK
General Description
SDRAM
FLASH
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