UCC1580-1 Unitrode Semiconductor, UCC1580-1 Datasheet - Page 6

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UCC1580-1

Manufacturer Part Number
UCC1580-1
Description
Single Ended Active Clamp Reset PWM
Manufacturer
Unitrode Semiconductor
Datasheet
APPLICATION INFORMATION (cont.)
where
and discharge time are given by
1400
1200
1000
800
600
400
200
t
CH
0
0
= R1
1
Figure 3. Oscillator and Ramp Circuits
= R1
100
Delay Ratio
200
C
T
CT and
Figure 2. Delay Times
and t
300
R3 ProgrammingResistor [k ]
DIS
400
Delay Times
Delay2
2
= 1.25
500
= R2
600
R2
CT. The charge time
700
C
800
Delay1
T
900
UDG-96016-1
1000
1.80
1.70
1.60
1.50
1.40
1.30
1.20
1.10
6
The CLK output is high during the discharge period. It
blanks the output to limit the maximum duty cycle of
OUT1. The frequency and maximum duty cycle are
given by
Maximum Duty Cycle for OUT1 will be slightly less due
to Delay1 which is programmed by R3.
Voltage Feedforward and Volt-Second Clamp
UCC3580 has a provision for input voltage feedforward.
As shown in Figure 3, the ramp slope is made propor-
tional to input line voltage by converting it into a charg-
ing current for CR. This provides a first order
cancellation of the effects of line voltage changes on
converter performance. The maximum volt-second
clamp is provided to protect against transient saturation
of the transformer core. It terminates the OUT1 pulse
when the RAMP voltage exceeds 3.3V. If the feedfor-
ward feature is not used, the ramp can be generated by
tying R4 to REF. However, the linearity of ramp suffers
and in this case the maximum volt-second clamp is no
longer available.
Output Configurations
The UCC3580 family of ICs is designed to provide con-
trol functions for single ended active clamp circuits. For
different implementations of the active clamp approach,
different drive waveforms for the two switches (main
and auxiliary) are required. The -3 and -4 versions of
the IC supply complementary non-overlapping wave-
forms (OUT1 and OUT2) with programmable delay
which can be used to drive the main and auxiliary
switches. Most active clamp configurations will require
one of these outputs to be transformer coupled to drive
a floating switch (e.g. Figure 5). The -1 and -2 versions
have the phase of OUT2 inverted to give overlapping
waveforms. This configuration is suitable for capacity
coupled driving of a ground referenced p-channel auxil-
iary switch with the OUT2 drive while OUT1 is directly
driving an n-channel main switch (e.g. Figure 4).
The programmable delay can be judiciously used to get
zero voltage turn-on of both the main and auxiliary
switches in the active clamp circuits. For the UCC3580,
a single pin is used to program the delays between
OUT1 and OUT2 on both sets of edges. Figure 1
shows the relationships between the outputs. Figure 2
gives the ratio between the two delays. During the tran-
sition from main to auxiliary switch, the delay is not
Frequency
Maximum Duty Cycle
R1
1.25
1
R1
R2
1.25 R2
R1
UCC1580-1,-2,-3,-4
UCC2580-1,-2,-3,-4
UCC3580-1,-2,-3,-4
C
T

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