IDT72285 Integrated Device Technology, IDT72285 Datasheet - Page 19

• Manufacturer Part Number: IDT72285
• Description: 64k X 18 Supersync Fifo, 5.0v
• Manufacturer: Integrated Device Technology

NOTES:
1. Retransmit setup is complete after EF returns HIGH, only then can a read operation begin.
2. OE = LOW.
3. W
4. No more than D - 2 may be written to the FIFO between Reset (Master or Partial) and Retransmit setup. Therefore, FF will be HIGH throughout the Retransmit
5. EF goes HIGH at 60 ns + 1 RCLK cycle + t
IDT72275/72285
CMOS SuperSync FIFO™ 32,768 x 18 and 65,536 x 18
setup procedure. D = 32,768 for IDT72275 and 65,536 for IDT72285.
1
= first word written to the FIFO after Master Reset, W
Q
WCLK
RCLK
0
WEN
REN
- Q
PAE
PAF
HF
RT
EF
n
t
ENS
W
x
t
t
A
ENH
REF
t
ENS
.
t
RTS
t
RTS
Figure 11. Retransmit Timing (IDT Standard Mode)
2
= second word written to the FIFO after Master Reset.
t
t
t
ENH
REF
HF
t
SKEW2
1
W
x+1
19
2
t
PAF
1
t
ENS
2
t
t
t
A
REF
PAE
(5)
COMMERCIAL AND INDUSTRIAL
W
1
(3)
TEMPERATURE RANGES
4674 drw 14
t
t
ENH
A
W
2
(3)