74AUP2G79 NXP Semiconductors, 74AUP2G79 Datasheet - Page 11

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74AUP2G79

Manufacturer Part Number
74AUP2G79
Description
Low-power dual D-type flip-flop
Manufacturer
NXP Semiconductors
Datasheet

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Table 8.
Voltages are referenced to GND (ground = 0 V); for test circuit see
[1]
[2]
[3]
12. Waveforms
74AUP2G79_2
Product data sheet
Symbol Parameter
C
Fig 7.
PD
All typical values are measured at nominal V
t
C
P
f
f
C
V
N = number of inputs switching;
pd
i
o
(C
D
CC
PD
= input frequency in MHz;
L
= output frequency in MHz;
is the same as t
= output load capacitance in pF;
= C
L
is used to determine the dynamic power dissipation (P
= supply voltage in V;
power
dissipation
capacitance
Measurement points are given in
Logic levels: V
The clock input (nCP) to output (nQ) propagation delays
PD
V
Dynamic characteristics
CC
2
V
CC
f
o
2
) = sum of the outputs.
PLH
f
i
OL
Conditions
f = 1 MHz;
V
N + (C
and t
I
and V
V
V
V
V
V
V
= GND to V
CC
CC
CC
CC
CC
CC
PHL
= 0.8 V
= 1.1 V to 1.3 V
= 1.4 V to 1.6 V
= 1.65 V to 1.95 V
= 2.3 V to 2.7 V
= 3.0 V to 3.6 V
OH
L
.
nCP input
nQ output
nD input
are typical output voltage levels that occur with the output load.
V
CC
CC
2
…continued
Table
GND
GND
V
V
f
o
OH
OL
) where:
V
V
I
I
CC
9.
.
Rev. 02 — 19 March 2008
[3]
V
M
25 C
Min Typ
-
-
-
-
-
-
D
t
V
in W).
PHL
M
Low-power dual D-type flip-flop; positive-edge trigger
1.6
1.7
1.8
1.9
2.3
2.7
[1]
Figure
Max Min
-
-
-
-
-
-
9.
V
-
-
-
-
-
-
M
40 C to +85 C
t
PLH
V
M
001aaf271
Max
-
-
-
-
-
-
74AUP2G79
Min
-
-
-
-
-
-
40 C to +125 C Unit
© NXP B.V. 2008. All rights reserved.
Max
-
-
-
-
-
-
11 of 19
pF
pF
pF
pF
pF
pF

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