74AUP2G79 NXP Semiconductors, 74AUP2G79 Datasheet - Page 12

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74AUP2G79

Manufacturer Part Number
74AUP2G79
Description
Low-power dual D-type flip-flop
Manufacturer
NXP Semiconductors
Datasheet

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Table 9.
74AUP2G79_2
Product data sheet
Supply voltage
V
0.8 V to 3.6 V
Fig 8.
CC
Measurement points are given in
Logic levels: V
The shaded areas indicate when the input is permitted to change for predictable output performance.
The clock input (nCP) to output (nQ) propagation delays, nCP clock pulse width, nD to nCP set-up times,
nCP to nD hold times and the nCP maximum frequency
Measurement points
OL
and V
nCP input
nQ output
nD input
Output
V
0.5
OH
M
are typical output voltage drop that occur with the output load.
V
GND
GND
V
V
CC
OH
OL
V
V
I
I
Table
9.
V
M
Rev. 02 — 19 March 2008
t
su
Input
V
0.5
M
t
V
h
M
V
Low-power dual D-type flip-flop; positive-edge trigger
CC
t
t
PHL
V
W
M
1/f
max
t
su
V
V
I
CC
t
h
t
PLH
001aaf272
74AUP2G79
t
r
3.0 ns
= t
© NXP B.V. 2008. All rights reserved.
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