HT46R71D Holtek Semiconductor, HT46R71D Datasheet - Page 15

• Manufacturer Part Number: HT46R71D
• Description: A/D with LCD Type 8-Bit MCU
• Manufacturer: Holtek Semiconductor

Reset
There are three ways in which a reset may occur.
The WDT time-out during HALT or IDLE differs from
other chip reset conditions, for it can perform a warm
reset that resets only the program counter and SP and
leaves the other circuits at their original state. Some reg-
isters remain unaffected during any other reset condi-
tions. Most registers are reset to the initial condition
once the reset conditions are met. By examining the
PDF and TO flags, the program can distinguish between
different chip resets .
Note: u stands for unchanged
To guarantee that the system oscillator is started and
stabilized, the SST (System Start-up Timer) provides an
extra-delay of 1024 system clock pulses when the sys-
tem awakes from the HALT state or during power-up.
Awaking from the HALT state or system power-up, the
SST delay is added.
An extra SST delay is added during the power-up pe-
riod, and any wake-up from HALT may enable only the
SST delay.
The functional unit chip reset status is shown below.
Rev. 1.00
Program Counter
Interrupt
Prescaler, Divider
WDT
Timer/Event Counter
Input/output Ports
Stack Pointer
TO PDF
RES is reset during normal operation
RES is reset during HALT
WDT time-out is reset during normal operation
0
u
0
1
1
0
u
1
u
1
RES reset during power-up
RES reset during normal operation
RES Wake-up HALT
WDT time-out during normal operation
WDT Wake-up HALT
RESET Conditions
000H
Disabled
Cleared
Cleared. After master reset,
WDT starts counting
Off
Input mode
Points to the top of the stack
15
Note:
nected to the RES pin as short as possible, to
avoid noise interference.
* Make the length of the wiring, which is con-
Reset Configuration
Reset Timing Chart
Reset Circuit
HT46R71D
January 9, 2006