HT46R71D Holtek Semiconductor, HT46R71D Datasheet - Page 17

• Manufacturer Part Number: HT46R71D
• Description: A/D with LCD Type 8-Bit MCU
• Manufacturer: Holtek Semiconductor

Timer/Event Counter
Two timer/event counters (TMR0,TMR1) are imple-
mented in the microcontroller. The Timer/Event Counter
0 contains a 8-bit programmable count-up counter and
the clock may come from an external source or an inter-
nal clock source. An internal clock source comes from
f
a 16-bit programmable count-up counter and the clock
may come from an external source or an internal clock
source. An internal clock source comes from f
Internal RC selected by special function register option.
The external clock input allows the user to count exter-
nal events, measure time intervals or pulse widths, or to
generate an accurate time base.
There are two registers related to the Timer/Event
Counter 0; TMR0 ([0DH]) and TMR0C ([0EH]). Writing
to TMR0 puts the starting value in the Timer/Event
Counter 0 register and reading TMR0 reads out the con-
tents of Timer/Event Counter 0. The TMR0C is a
timer/event counter control register, which defines some
options. There are three registers related to the
Timer/Event Counter 1; TMR1H (0FH), TMR1L (10H)
and TMR1C (11H). Writing to TMR1L will only put the
written data into an internal lower-order byte buffer
(8-bit) while writing to TMR1H will transfer the specified
data and the contents of the lower-order byte buffer to
both the TMR1H and TMR1L registers, respectively.
The Timer/Event Counter 1 preload register is changed
every time there is a write operation to TRM1H. Reading
TMR1H will latch the contents of TMR1H and TMR1L
counters to the destination and the lower-order byte
Rev. 1.00
SYS
or Internal RC. The Timer/Event Counter 1 contains
Timer/Event Counter 0
Timer/Event Counter 1
SYS
/4 or
17
buffer, respectively. Reading TMR1L will read the con-
tents of the lower-order byte buffer. The TMR1C is the
Timer/Event Counter 1 control register, which defines
the operating mode, counting enable or disable and an
active edge.
The T0M0, T0M1 (TMR0C) and T1M0, T1M1 (TMR1C)
bits define the operation mode. The event count mode is
used to count external events, which means that the
clock source must come from an external (TMR0,
TMR1) pin. The timer mode functions as a normal timer
with the clock source coming from the internal selected
clock source. Finally, the pulse width measurement
mode can be used to count a high or low level duration
of an external signal on TMR0 or TMR1, with the timing
based on the internal selected clock source.
In the event count or timer mode, the Timer/Event Coun-
ter 0 (1) starts counting at the current contents in the
Timer/Event Counter 0 (1) and ends at FFH (FFFFH).
Once an overflow occurs, the counter is reloaded from
the timer/event counter preload register, and generates
an interrupt request flag (T0F; bit 5 of INTC0, T1F; bit6
of INTC0). In the pulse width measurement mode with
the values of the T0ON/T1ON and T0E/T1E bits equal
to 1, after the TMR0 (TMR1) has received a transient
from low to high (or high to low if the TE bit is 0 ), it will
start counting until the TMR0 (TMR1) pin returns to the
original level and resets the T0ON/T1ON bit. The mea-
sured result remains in the timer/event counter even if
the activated transient occurs again. In other words,
only a 1-cycle measurement can be made until the
T0ON/T1ON is set. The cycle measurement will
HT46R71D
January 9, 2006