HT46R74D-1 Holtek Semiconductor, HT46R74D-1 Datasheet - Page 13

• Manufacturer Part Number: HT46R74D-1
• Description: Dual Slope A/D Type MCU
• Manufacturer: Holtek Semiconductor

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variations. By using the related WDT configuration op-
tion, longer time-out periods can be .implemented. If the
WDT time-out is selected to be 2
time-out period is divided by 2
time-out period of about 2.3s~4.7s.
The WDT clock source may also come from the instruc-
tion clock, in which case the WDT will operate in the
same manner except that in the Power Down mode the
WDT will stop counting and lose its protecting purpose.
In this situation the device can only be restarted by ex-
ternal logic. If the device operates in a noisy environ-
ment, using the on-chip RC oscillator is strongly
recommended, since the HALT instruction will stop the
system clock.
Under normal operation, a WDT overflow initialises a
device reset and sets the status bit TO . In the HALT or
IDLE mode, the overflow initialises a warm reset , and
Note: WDTOSC registers initial value will be set to enable (1,0), if both WDT option enable and WDT clock option
The WDT clock (f
sion ratio can be varied by selecting different configuration options to give 2
Rev. 1.10
Bit No.
Bit No.
0~1
2~3
4~7
0~7
set to WDT , otherwise, it will be set to disable (0,1)
WDTPWR0~
WDTPWR1
WDTOSC0~
WDTOSC1
WDTD0~
WDTD7
Label
Label
S1
) is further divided by an internal counter to give longer watchdog time-outs., In this device, the divi-
WDT Power source selection.
01: WDT power comes from VOCHP
10: WDT power comes from the regulator
00/11: WDT power comes from VOCHP strongly recommend use to use 01 for VOCHP
prevent the noise to let the WDT lose the power
The WDT oscillator enable/disable (WDTOSC1:0)=
01: WDT OSC disable10: WDT OSC enable
00/11: WDT OSC enable strongly recommend use to use 10 for WDT OSC enable
Reserved
The WDT counter data value.
This register is read only. It s used for temperature adjusting.
15
~2
16
15
which will give a
, the maximum
WDTC (1CH) Register
WDTD (1DH) Register
Watchdog Timer
13
only the PC and SP are reset to zero. There are three
methods to clear the contents of the WDT, an external
low level on RES, a software instruction or a HALT in-
struction. There are two types of software instructions;
the single CLR WDT instruction, or the pair of instruc-
tions
Of these two types of instruction, only one type of in-
struction can be active at a time depending on the con-
figuration option
If the CLR WDT is selected (i.e., CLR WDT times
equal one), any execution of the CLR WDT instruction
clears the WDT. If the CLR WDT1 and CLR WDT2
option is chosen (i.e., CLR WDT times equal two), these
two instructions have to be executed to clear the WDT,
otherwise the WDT may reset the device due to a
time-out.
Function
Function
CLR WDT1 and CLR WDT2 .
13
to 2
CLR WDT times selection option.
16
division ration range.
HT46R74D-1
January 11, 2007