HT46R74D-1 Holtek Semiconductor, HT46R74D-1 Datasheet - Page 14

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HT46R74D-1

Manufacturer Part Number
HT46R74D-1
Description
Dual Slope A/D Type MCU
Manufacturer
Holtek Semiconductor
Datasheet
www.DataSheet4U.com
Multi-function Timer
The device provides a multi-function timer for the RTC,
LCD and buzzer functions but with different time-out pe-
riods. The multi-function timer consists of an 8-stage di-
vider and a 7-bit prescaler, with the clock source coming
from the WDT OSC, the RTC OSC or the instruction
clock which is the system clock divided by 4. The
multi-function timer also provides a selectable fre-
quency signal, which ranges from f
LCD driver circuits, and a selectable frequency signal,
ranging from f
configuration options. It is recommended to select a fre-
quency as close as possible to 4kHz signal for the LCD
driver circuits to ensure a proper display.
For the Charge Pump and the ADC chopper , the clock
is independent of the multi-function timer. The clock al-
ways sourced from the system clock (RC or Crystal).
Real Time Clock - RTC
The real time clock, RTC, is operated in the same man-
ner as the time base in that it is used to supply a regular
internal interrupt. Its time-out period ranges from f
f
RT1 and RT0, which are bits 2, 1, 0 of the RTCC regis-
ter, provides various time-out periods. If an RTC
time-out occurs, the related interrupt request flag, RTF;
bit 6 of INTC1, is set. But if the interrupt is enabled, and if
the stack is not full, a subroutine call to location 18H oc-
curs.
Note: * not recommended for use
Rev. 1.10
S
/2
RT2
15
0
0
0
0
1
1
1
1
by software programming . Writing data to RT2,
RT1
0
0
1
1
0
0
1
1
S
/2
2
RT0
to f
0
1
0
1
0
1
0
1
S
/2
9
, for the buzzer output using
RTC Clock Divided Factor
S
/2
2
2
2
2
2
2
2
2
2
10
11
8
9
12
13
14
15
to f
*
*
*
*
S
/2
8
, for the
S
/2
8
to
14
Buzzer Output
The Buzzer function provides a means of producing a
variable frequency output, suitable for applications such
as Piezo-buzzer driving or other external circuits that re-
quire a precise frequency generator. The BZ and BZ
pins form a complimentary pair, and are pin-shared with
I/O pins, PA0 and PA1. A configuration option is used to
select from one of three buzzer options. The first option
is for both pins PA0 and PA1 to be used as normal I/Os,
the second option is for both pins to be configured as BZ
and BZ buzzer pins, the third option selects only the PA0
pin to be used as a BZ buzzer pin with the PA1 pin re-
taining its normal I/O pin function. Note that the BZ pin is
the inverse of the BZ pin which together generate a dif-
ferential output which can supply more power to con-
nected interfaces such as buzzers.
The buzzer is driven by the internal clock source, f
which then passes through a divider, the division ratio of
which is selected by configuration options to provide a
range of buzzer frequencies from f
The clock source that generates f
trols the buzzer frequency, can originate from two differ-
ent sources, the Int.RCOSC (Internal RC oscillator) or
the System oscillator/4, the choice of which is deter-
mined by the f
that the buzzer frequency is controlled by configuration
options, which select both the source clock for the inter-
nal clock f
internal registers associated with the buzzer frequency.
If the configuration options have selected both pins PA0
and PA1 to function as a BZ and BZ complementary pair
of buzzer outputs, then for correct buzzer operation it is
essential that both pins must be setup as outputs by set-
ting bits PAC0 and PAC1 of the PAC port control register
to zero. The PA0 data bit in the PA data register must
also be set high to enable the buzzer outputs, if set low,
both pins PA0 and PA1 will remain low. In this way the
single bit PA0 of the PA register can be used as an on/off
control for both the BZ and BZ buzzer pin outputs. Note
that the PA1 data bit in the PA register has no control
over the BZ buzzer pin PA1.
S
and the internal division ratio. There are no
S
clock source configuration option. Note
Real Time Clock
S
S
HT46R74D-1
, which in turn con-
/2
2
January 11, 2007
to f
S
/2
9
.
S
,

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