MA5114 Dynex, MA5114 Datasheet
MA5114
Related parts for MA5114
MA5114 Summary of contents
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... Replaces June 1999 version, DS3591-4.0 The MA5114 4k Static RAM is configured as 1024 x 4 bits and manufactured using CMOS-SOS high performance, radiation hard technology. The design uses a 6 transistor cell and has full static operation with no clock or timing strobe required. Address input buffers are deselected when Chip Select is in the HIGH state ...
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... MA5114 CHARACTERISTICS AND RATINGS Symbol Parameter V Supply Voltage CC V Input Voltage I T Operating Temperature A T Storage Temperature S Figure 3: Absolute Maximum Ratings Notes for Tables 4 and 5: 1. Characteristics apply to pre radiation at T radiation with 10% (characteristics at higher radiation levels available on request). ...
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... Rad(Si) total dose radiation A DD Conditions Min Figure 8: Capacitance Min Max Units 135 - ns - 135 ns - 135 Min Max Units 135 - Typ. Max. Units MA5114 3/12 ...
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... MA5114 Symbol Parameter F Basic Functionality T Subgroup Definition 1 Static characteristics specified in Tables 4 and Static characteristics specified in Tables 4 and 5 at +125 C 3 Static characteristics specified in Tables 4 and Functional characteristics specified in Table Functional characteristics specified in Table 9 at +125 C ...
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... Address Vaild prior to or coincident with CS transition low. ADDRESS DATA OUT high for Read Cycle. 2. Device is continually selected. CS low. T AVAVR T AVQV T ELQV T ELQX HIGH IMPEDANCE Figure 11a: Read Cycle 1 T AVAVR T AVQV Figure 11b: Read Cycle 2 T AXQX T EHQZ DATA VALID T AXQX DATA VALID MA5114 5/12 ...
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... MA5114 ADDRESS T WE HIGH DATA OUT IMPEDANCE DATA must be high during all address transitions write occurs during the overlap ( measured from either going high, whichever is the earlier, to the end of the write cycle. WHAV 4. If the CS low transition occurs simultaneously with, or after, the WE low transition, the output remains in the high impedance state ...
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... Typ 0.300 Typ. - 5.38 0.175 - 15° Max 0.225 0.060 0.023 0.014 0.910 0.212 0.326 9 Vss - 0.050 - 0.060 MA5114 18 Vdd Top 14 D1 View 7/12 ...
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... MA5114 Figure 14: 24-Lead Ceramic Flatpack (Solder Seal) - Package Style F 8/12 M Millimetres Pin 1 Ref Min 0.66 b 0.38 c 0.08 D 14. 6.73 M 9.96 Me 7.6 Z 0.13 XG544 Vdd Inches Nom. Max. Min. ...
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... Figure 15: 24-Pad Leadless Chip Carrier - Package Style Vdd Inches Max. Min. Nom. 2. 0.020 9.14 0.345 - 9.14 0.345 - - - 0.040 - - 0.0075 Bottom 12 View Max. 0.096 - 0.360 0.360 - - MA5114 NC CS Vss 9/12 ...
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... MA5114 ion Func t ion NCS 11 8 VSS 12 9 NWE VDD F0=150KHz, F1=F0/2, F2=F0/4, F3=F0/8 etc. 2. Burnin R=1k 3. Radiation R=10k ...
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... Transient Upset (Survivability) Neutron Hardness (Function to specification) Single Event Upset** Latch Up * Other total dose radiation levels available on request ** Worst case galactic cosmic ray upset - interplanetary/high altitude orbit Figure 17: Radiation Hardness Parameters 2 Ion LET (MeV.cm /mg) MA5114 5 1x10 Rad(Si) 10 5x10 Rad(Si)/sec 12 >1x10 Rad(Si)/sec ...
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... MA5114 ORDERING INFORMATION Unique Circuit Designator Radiation Tolerance S Radiation Hard Processing L 30 kRads (Si) Guaranteed C 50 kRads (Si) Guaranteed R 100 kRads (Si) Guaranteed Package Type C Ceramic DIL (Solder Seal) F Flatpack (Solder Seal) L Leadless Chip Carrier For details of reliability, QA/QC, test and assembly options, see ‘Manufacturing Capability and Quality Assurance Standards’ ...