dsPIC33F Microchip Technology, dsPIC33F Datasheet - Page 30

• Manufacturer Part Number: dsPIC33F
• Description: (dsPIC24H / dsPIC33F) Flash Programming Specification
• Manufacturer: Microchip Technology

dsPIC33F/PIC24H PROGRAMMING SPECIFICATION
2.4
The program memory map extends from 0x0 to
0xFFFFFE. Code storage is located at the base of the
memory map and supports up to 88K instructions
(about 256 Kbytes). Table 2-2 shows the program
memory size and number of erase and program blocks
present in each device variant. Each erase block, or
page, contains 512 instructions and each program
block, or row, contains 64 instructions.
Locations 0x800000 through 0x800FFE are reserved
for executive code memory. This region stores the
programming executive and the debugging executive.
The programming executive is used for device pro-
TABLE 2-2:
DS70152D-page 30
dsPIC33FJ64GP206
dsPIC33FJ64GP306
dsPIC33FJ64GP310
dsPIC33FJ64GP706
dsPIC33FJ64GP708
dsPIC33FJ64GP710
dsPIC33FJ128GP206
dsPIC33FJ128GP306
dsPIC33FJ128GP310
dsPIC33FJ128GP706
dsPIC33FJ128GP708
dsPIC33FJ128GP710
dsPIC33FJ256GP506
dsPIC33FJ256GP510
dsPIC33FJ256GP710
dsPIC33FJ64MC506
dsPIC33FJ64MC508
dsPIC33FJ64MC510
dsPIC33FJ64MC706
dsPIC33FJ64MC710
dsPIC33FJ128MC506
dsPIC33FJ128MC510
dsPIC33FJ128MC706
dsPIC33FJ128MC708
dsPIC33FJ128MC710
dsPIC33FJ256MC510
dsPIC33FJ256MC710
PIC24HJ64GP206
PIC24HJ64GP210
PIC24HJ64GP506
PIC24HJ64GP510
PIC24HJ128GP206
PIC24HJ128GP210
dsPIC33F/PIC24H Device
Memory Map
CODE MEMORY SIZE
User Memory Address
(Instruction Words)
0x00ABFE (22K)
0x00ABFE (22K)
0x00ABFE (22K)
0x00ABFE (22K)
0x00ABFE (22K)
0x00ABFE (22K)
0x00ABFE (22K)
0x00ABFE (22K)
0x00ABFE (22K)
0x00ABFE (22K)
0x00ABFE (22K)
0x00ABFE (22K)
0x00ABFE (22K)
0x00ABFE (22K)
0x00ABFE (22K)
0x0157FE (44K)
0x0157FE (44K)
0x0157FE (44K)
0x0157FE (44K)
0x0157FE (44K)
0x0157FE (44K)
0x02ABFE (88K)
0x02ABFE (88K)
0x02ABFE (88K)
0x0157FE (44K)
0x0157FE (44K)
0x0157FE (44K)
0x0157FE (44K)
0x0157FE (44K)
0x02ABFE (88K)
0x02ABFE (88K)
0x0157FE (44K)
0x0157FE (44K)
Limit
Preliminary
Write Blocks
gramming and the debug executive is used for in-circuit
debugging. This region of memory can not be used to
store user code.
Locations 0xF80000 through 0xF80017 are reserved
for the device Configuration registers.
Locations 0xFF0000 and 0xFF0002 are reserved for
the Device ID Word registers. These bits can be used
by the programmer to identify what device type is being
programmed. They are described in Section 7.0
“Device ID”. The Device ID registers read out
normally, even after code protection is applied.
Figure 2-3 shows the memory map for the dsPIC33F/
PIC24H family variants.
1368
1368
1368
1368
1368
344
344
344
344
344
344
688
688
688
688
688
688
344
344
344
344
344
688
688
688
688
688
344
344
344
344
688
688
Erase Blocks
171
171
171
171
171
43
43
43
43
43
43
86
86
86
86
86
86
43
43
43
43
43
86
86
86
86
86
43
43
43
43
86
86
© 2007 Microchip Technology Inc.
Executive Memory Address
Limit (Instruction Words)
0x800FFE (2K)
0x800FFE (2K)
0x800FFE (2K)
0x800FFE (2K)
0x800FFE (2K)
0x800FFE (2K)
0x800FFE (2K)
0x800FFE (2K)
0x800FFE (2K)
0x800FFE (2K)
0x800FFE (2K)
0x800FFE (2K)
0x800FFE (2K)
0x800FFE (2K)
0x800FFE (2K)
0x800FFE (2K)
0x800FFE (2K)
0x800FFE (2K)
0x800FFE (2K)
0x800FFE (2K)
0x800FFE (2K)
0x800FFE (2K)
0x800FFE (2K)
0x800FFE (2K)
0x800FFE (2K)
0x800FFE (2K)
0x800FFE (2K)
0x800FFE (2K)
0x800FFE (2K)
0x800FFE (2K)
0x800FFE (2K)
0x800FFE (2K)
0x800FFE (2K)