dsPIC33F Microchip Technology, dsPIC33F Datasheet - Page 46

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dsPIC33F

Manufacturer Part Number
dsPIC33F
Description
(dsPIC24H / dsPIC33F) Flash Programming Specification
Manufacturer
Microchip Technology
Datasheet

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dsPIC33F/PIC24H PROGRAMMING SPECIFICATION
In addition to code memory protection, a part of Data
RAM can be configured to be accessible only by code
resident in the Boot Segment and/or Secure Segment.
The sizes of these “reserved” sections are user-config-
urable, using the RBS<1:0> and RSS<1:0> bits.
FIGURE 3-5:
3.7
Exiting Program/Verify mode is done by removing V
from MCLR, as shown in Figure 3-6. The only require-
ment for exit is that an interval P16 should elapse
between the last clock and program signals on PGC
and PGD before removing V
DS70152D-page 46
Note:
Exiting Enhanced ICSP Mode
All bits in the FBS, FSS and FGS Configu-
ration registers can only be programmed
to a value of ‘0’. the ERASEB command is
the only way to reprogram code-protect
bits from ON (‘0’) to OFF (‘1’).
ConfigAddress + 2
ConfigAddress =
CONFIGURATION BIT PROGRAMMING FLOW
IH
.
No
Preliminary
IH
PROGC response
ConfigAddress
0xF80018?
Send PROGC
Command
PASS?
Finish
Start
3.6.5
The dsPIC33F/PIC24H devices provide four 8-bit Con-
figuration registers (FUID0 through FUID3) for the user
to store product-specific information, such as unit serial
numbers and other product manufacturing data.
FIGURE 3-6:
Is
Is
Yes
Yes
MCLR
V
PGD
PGC
DD
ConfigAddress = 0xF80000
USER UNIT ID
No
PGD = Input
EXITING ENHANCED
ICSP™ MODE
Report Error
© 2007 Microchip Technology Inc.
Failure
V
P16
IH
P17
V
IH

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