LM3S101 Luminary Micro, Inc., LM3S101 Datasheet - Page 14

• Manufacturer Part Number: LM3S101
• Description: Microcontroller
• Manufacturer: Luminary Micro, Inc.

Revision History
Revision History
14
September 2006
March 27, 2006
March 30, 2006
October 2006
May 2006
July 2006
Date
This table provides a summary of the document revisions.
Revision
00
01
02
03
04
05
Description
Initial public release of LM3S101 and LM3S102 data sheets.
Second release of LM3S101 and LM3S102 data sheets. Includes the following
changes:
• Added timing data.
Third release of LM3S101 and LM3S102 data sheets. Includes the following
changes:
• Added Initialization and Configuration section to System Control chapter
• Renamed boot oscillator to internal oscillator
• Corrected reset value of DC1 in System Control Register Map (was correct on
• Corrected description of bits to set to enable PWM mode in timer
• Corrected WDTICR register offset (was correct in Register Map but not on
• Added Watchdog Test (WDTTEST) register
• Changed some bit and register names for consistency with DriverLib:
• Fixed minor style and edit issues
Fourth release of LM3S101 and LM3S102 data sheets. Includes the following
changes:
• Added initialization and configuration content into PWM, Comparators, and
• Clarified that peripheral clock must be set before enabling peripherals in
Fifth release of LM3S101 data sheet. Includes the following changes:
• Updated the clocking examples in the I2C chapter.
• Added “5-V-tolerant” description for GPIOs to feature list, GPIO chapter, and
• Added maximum values for 20 MHz and 25 MHz parts to Table 9-1, “16-Bit
• Made the following changes in the System Control chapter:
Sixth release of LM3S101 data sheet. Includes the following changes:
• Added Serial Flash Loader usage information.
register reference page)
register reference page)
- Changed USESYS bit in RCC register to USESYSDIV
- Changed name of Capture bit fields in GPTMIMR, GPTMRIS, GPTMMIS,
JTAG chapters.
“Initialization and Configuration” sections.
Electrical chapter.
Timer With Prescaler Configurations” in the Timers chapter.
- Updated field descriptions in the
- Updated the internal oscillator clock speed.
- Added the Deep-Sleep Clock Configuration (DSLPCFG) register.
- Added bus fault information to the clock gating registers.
and GPTMICR registers from C1bitname and C2bitname to CAbitname and
CBbitname
(RCC)
register.
Preliminary
Run-Mode Clock Configuration
October 5, 2006