LM3S101 Luminary Micro, Inc., LM3S101 Datasheet - Page 61

• Manufacturer Part Number: LM3S101
• Description: Microcontroller
• Manufacturer: Luminary Micro, Inc.

October 5, 2006
Reset
Reset
Type
Type
Bit/Field
31:16
15:2
Power-On and Brown-Out Reset Control (PBORCTL)
Offset 0x030
1
0
R/W
RO
31
15
0
0
Register 8: Power-On and Brown-Out Reset Control (PBORCTL), offset 0x030
This register is responsible for controlling reset conditions after initial power-on reset.
R/W
RO
30
14
0
1
BORIOR
reserved
BORTIM
BORWT
Name
R/W
RO
29
13
0
1
R/W
RO
28
12
0
1
Type
R/W
R/W
R/W
R/W
RO
RO
27
11
0
1
R/W
RO
26
10
0
1
0x1FFF
Reset
R/W
RO
25
0
9
1
0
0
1
BORTIM
Preliminary
R/W
RO
24
0
8
1
reserved
Description
Reserved bits return an indeterminate value, and should
never be changed.
This field specifies the number of internal oscillator clocks
delayed before the BOR output is resampled if the BORWT
bit is set.
The width of this field is derived by the t
and the internal oscillator (IOSC) frequency of 15 MHz ±
50%. At +50%, the counter value has to exceed 10,000.
BOR Interrupt or Reset
This bit controls how a BOR event is signaled to the
controller. If set, a reset is signaled. Otherwise, an interrupt
is signaled.
BOR Wait and Check for Noise
This bit specifies the response to a brown-out signal
assertion. If BORWT is set to 1, the controller waits BORTIM
IOSC periods before resampling the BOR output, and if
asserted, it signals a BOR condition interrupt or reset. If the
BOR resample is deasserted, the cause of the initial
assertion was likely noise and the interrupt or reset is
suppressed. If BORWT is 0, BOR assertions do not resample
the output and any condition is reported immediately if
enabled.
R/W
RO
23
0
7
1
R/W
RO
22
0
6
1
R/W
RO
21
0
5
1
R/W
RO
20
0
4
1
R/W
RO
19
0
3
1
LM3S101 Data Sheet
BOR
R/W
RO
18
0
2
1
width of 500 μs
BORIOR BORWT
R/W
RO
17
0
1
0
R/W
RO
16
0
0
1
61