LM3S101 Luminary Micro, Inc., LM3S101 Datasheet - Page 147

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LM3S101

Manufacturer Part Number
LM3S101
Description
Microcontroller
Manufacturer
Luminary Micro, Inc.
Datasheet

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October 5, 2006
Reset
Reset
Type
Type
Bit/Field
31:3
GPTM Configuration (GPTMCFG)
Offset 0x000
2:0
RO
RO
31
15
0
0
Register 1: GPTM Configuration (GPTMCFG), offset 0x000
This register configures the global operation of the GPTM module. The value written to this
register determines whether the GPTM is in 32- or 16-bit mode.
RO
RO
30
14
0
0
GPTMCFG
reserved
Name
RO
RO
29
13
0
0
RO
RO
28
12
0
0
Type
R/W
RO
RO
RO
27
11
0
0
RO
RO
26
10
0
0
Reset
0
0
reserved
RO
RO
25
0
9
0
Preliminary
Description
Reserved bits return an indeterminate value, and should never
be changed.
GPTM Configuration
0x0: 32-bit timer configuration.
0x1: 32-bit real-time clock (RTC) counter configuration.
0x2: Reserved.
0x3: Reserved.
0x4-0x7: 16-bit timer configuration, function is controlled by bits
1:0 of GPTMTAMR and GPTMTBMR.
RO
RO
24
0
8
0
reserved
RO
RO
23
0
7
0
RO
RO
22
0
6
0
RO
RO
21
0
5
0
RO
RO
20
0
4
0
RO
RO
19
0
3
0
LM3S101 Data Sheet
R/W
RO
18
0
2
0
GPTMCFG
R/W
RO
17
0
1
0
R/W
RO
16
0
0
0
147

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