LM3S316 Luminary Micro, Inc., LM3S316 Datasheet - Page 137
![no-image](/images/no-image-200.jpg)
LM3S316
Manufacturer Part Number
LM3S316
Description
Microcontroller
Manufacturer
Luminary Micro, Inc.
Datasheet
1.LM3S316.pdf
(421 pages)
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- Current page: 137 of 421
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April 27, 2007
Reset
Reset
Type
Type
Bit/Field
31:8
GPIO 8-mA Drive Select (GPIODR8R)
Offset 0x508
7:0
RO
RO
31
15
0
0
Register 13: GPIO 8-mA Drive Select (GPIODR8R), offset 0x508
The GPIODR8R register is the 8-mA drive control register. It allows for each GPIO signal in the
port to be individually configured without affecting the other pads. When writing the DRV8 bit for a
GPIO signal, the corresponding DRV2 bit in the GPIODR2R register and the DRV4 bit in the
GPIODR4R register are automatically cleared by hardware.
RO
RO
30
14
0
0
reserved
Name
DRV8
RO
RO
29
13
0
0
RO
RO
28
12
0
0
reserved
Type
R/W
RO
RO
RO
27
11
0
0
RO
RO
26
10
0
0
Reset
0x00
0
RO
RO
25
0
9
0
Preliminary
Description
Reserved bits return an indeterminate value, and should never
be changed.
Output Pad 8-mA Drive Enable
A write of 1 to either
corresponding 8-mA enable bit. The change is effective on the
second clock cycle after the write.
RO
RO
24
0
8
0
reserved
R/W
RO
23
0
7
0
R/W
RO
22
0
6
0
GPIODR2
R/W
RO
21
0
5
0
R/W
RO
20
0
4
0
[n] or
DRV8
R/W
RO
GPIODR4
19
0
3
0
LM3S316 Data Sheet
R/W
RO
18
0
2
0
[n] clears the
R/W
RO
17
0
1
0
R/W
RO
16
0
0
0
137
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