LM3S316 Luminary Micro, Inc., LM3S316 Datasheet - Page 338

• Manufacturer Part Number: LM3S316
• Description: Microcontroller
• Manufacturer: Luminary Micro, Inc.

Inter-Integrated Circuit (I2C) Interface
338
Reset
Reset
Reset
Reset
Type
Type
Type
Type
Read-Only Status Register
Bit/Field
I2C Slave Status Register (I2CSCSR): Read
Offset 0x004
I2C Slave Control Register (I2CSCSR): Write
Offset 0x004
31:3
2
RO
RO
RO
RO
31
15
31
15
0
0
0
0
Register 11: I
This register accesses one control bit when written, and two status bits when read.
The read-only Status register consists of three bits: the FBR bit, the RREQ bit, and the TREQ bit. The
First Byte Received (FBR) bit is set only after the Stellaris device detects its own slave
address and receives the first data byte from the I
indicates that the Stellaris I
byte from the I2C Slave Data (I2CSDR) register to clear the RREQ bit. The Transmit Request
(TREQ) bit indicates that the Stellaris I
data byte into the I2C Slave Data (I2CSDR) register to clear the TREQ bit.
The write-only Control register consists of one bit: the DA bit. The DA bit enables and disables the
Stellaris I
RO
RO
RO
RO
30
14
30
14
0
0
0
0
reserved
RO
RO
RO
RO
Name
29
13
29
13
0
0
0
0
FBR
2
C slave operation.
RO
RO
RO
RO
2
28
12
28
12
0
0
0
0
C Slave Control/Status (I2CSCSR), offset 0x004
RO
RO
RO
RO
27
11
27
11
0
0
0
0
Type
RO
RO
2
RO
RO
RO
RO
26
10
26
10
C device has received a data byte from an I
0
0
0
0
RO
RO
RO
RO
25
25
0
9
0
0
9
0
Reset
Preliminary
reserved
reserved
0
0
2
C device is addressed as a Slave Transmitter. Write one
RO
RO
RO
RO
24
24
0
8
0
0
8
0
reserved
reserved
Description
Reserved bits return an indeterminate value, and should
never be changed.
Indicates that the first byte following the slave’s own
address is received. This bit is only valid when the RREQ
bit is set, and is automatically cleared when data has been
read from the I2CSDR register.
Note:
RO
RO
RO
RO
23
23
0
7
0
0
7
0
2
C master. The Receive Request (RREQ) bit
This bit is not used for slave transmit operations.
RO
RO
RO
RO
22
22
0
6
0
0
6
0
RO
RO
RO
RO
21
21
0
5
0
0
5
0
RO
RO
RO
RO
20
20
0
4
0
0
4
0
2
C master. Read one data
RO
RO
RO
RO
19
19
0
3
0
0
3
0
FBR
RO
RO
RO
RO
18
18
0
2
0
0
2
0
April 27, 2007
TREQ
RO
RO
RO
RO
17
17
0
1
0
0
1
0
RREQ
RO
RO
RO
WO
DA
16
16
0
0
0
0
0
0