LM3S316 Luminary Micro, Inc., LM3S316 Datasheet - Page 19

• Manufacturer Part Number: LM3S316
• Description: Microcontroller
• Manufacturer: Luminary Micro, Inc.

April 27, 2007
April 2007
April 2007
Date
Revision
03
04
Description
Fourth release of LM3S301, LM3S310, LM3S315, and LM3S316 data sheets.
Includes the following changes:
In the System Control chapter:
• Changed three bits in the RCGC0/SCGC0/DCGC0 registers to reserved (SWO,
• Changed instances of PLLCTL to PLLCFG.
• Changed the reset value to 0 for the ADC and MAXADCSPD bits in the
• Clarified description of MAXADCSPD bit in RCGC0 register.
• Updated the Main Clock Tree figure for the ADC.
In the Internal Memory chapter:
• Changed the reset value to 0x18 for the USEC bit in the USECRL register.
• Fixed issue with bit access in register diagrams for FMA register.
In the ADC chapter:
• Changed instance of ADCAMUX to ADCSSMUXin the ADC chapter.
• Updated the ADC block diagram to show hardware averaging circuit.
• Corrected the offset for ADCSSCTL3 in the register map and register
In the SSI chapter:
• Changed the wording for the SSIClk transmit clock.
In the Analog Comparator chapter:
• Clarified the wording in the Initialization section.
• Fixed conditional text issue in ACCTL0 register.
In the I
• Added the PREQ bit in the I2CSCSR register.
• Fixed typo in the Master Single Send flow chart.
In the Operating Characteristics chapter:
• Added information to Maximum Junction Temperature.
In the Electrical Characteristics chapter:
• Added information to the Power Specifications.
• Changed note in the ADC Clocking Characteristics table .
• Fixed conditional text issue in the ADC Characteristics table.
In the Package Information chapter:
• Fixed typo in 48-pin package drawing.
Fifth release of LM3S301, LM3S310, LM3S315, and LM3S316 data sheets.
Includes the following changes:
• In the Internal Memory chapter, added information on code protection.
• In the ARM Cortex-M3 Processor Core, Architecture Overview, and
• In the I
• In the Analog Comparator chapter, changed IN0-IN2 bit types from RO to R/
SWD, and JTAG).
RCGC0/SCGC0/DCGC0 registers.
description. It should be offset 0xA4, not 0x64.
General-Purpose Timers chapters, added information for the System Timer
(SysTick).
in accompanying figure to FBR. In the Timers chapter, added note to the
16-Bit Input Edge Time Mode section.
W1C in the ACMIS register.
2
C chapter:
2
C chapter, added description for FBR bit. Changed instances of PREQ
Preliminary
LM3S316 Data Sheet
19