LM3S315 Luminary Micro, Inc., LM3S315 Datasheet - Page 223

• Manufacturer Part Number: LM3S315
• Description: Microcontroller
• Manufacturer: Luminary Micro, Inc.

April 27, 2007
Reset
Reset
Type
Type
Bit/Field
ADC Sample Averaging Control (ADCSAC)
Offset 0x030
31:3
2:0
RO
RO
31
15
0
0
Register 10: ADC Sample Averaging Control (ADCSAC), offset 0x030
This register controls the amount of hardware averaging applied to conversion results. The final
conversion result stored in the FIFO is averaged from 2
specified ADC speed. If AVG is 0, the sample is passed directly through without any averaging. If
AVG is 6, 64 consecutive ADC samples are averaged to generate one result in the sequencer
FIFO. An AVG = 7 provides unpredictable results.
RO
RO
30
14
0
0
reserved
Name
AVG
RO
RO
29
13
0
0
RO
RO
28
12
0
0
Type
RO
RO
R/W
27
11
0
0
RO
RO
RO
26
10
0
0
reserved
Reset
RO
RO
25
0
9
0
0
0
Preliminary
RO
RO
24
0
8
0
reserved
Description
Reserved bits return an indeterminate value, and should
never be changed.
Specifies the amount of hardware averaging that will be
applied to ADC samples. The AVG field can be any value
between 0 and 6. Entering a value of 7 creates unpredictable
results.
RO
RO
23
0
7
0
RO
RO
22
0
6
0
AVG
consecutive ADC samples at the
RO
RO
21
0
5
0
RO
RO
20
0
4
0
RO
RO
19
0
3
0
LM3S315 Data Sheet
RO
R/W
18
0
2
0
AVG
RO
R/W
17
0
1
0
R/W
RO
16
0
0
0
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