LM3S315 Luminary Micro, Inc., LM3S315 Datasheet - Page 24
LM3S315
Manufacturer Part Number
LM3S315
Description
Microcontroller
Manufacturer
Luminary Micro, Inc.
Datasheet
1.LM3S315.pdf
(382 pages)
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Architectural Overview
24
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GPIOs
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Power
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Flexible Reset Sources
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Additional Features
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Can initiate an ADC sample sequence
7 to 32 GPIOs, depending on configuration
5-V-tolerant input/outputs
Programmable interrupt generation as either edge-triggered or level-sensitive
Bit masking in both read and write operations through address lines
Can initiate an ADC sample sequence
Programmable control for GPIO pad configuration:
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On-chip Low Drop-Out (LDO) voltage regulator, with programmable output user-adjustable
from 2.25 V to 2.75 V
Low-power options on controller: Sleep and Deep-sleep modes
Low-power options for peripherals: software controls shutdown of individual peripherals
User-enabled LDO unregulated voltage detection and automatic reset
3.3-V supply brownout detection and reporting via interrupt or reset
On-chip temperature sensor
Power-on reset (POR)
Reset pin assertion
Brown-out (BOR) detector alerts to system power drops
Software reset
Watchdog timer reset
Internal low drop-out (LDO) regulator output goes unregulated
Six reset sources
Programmable clock source control
Clock gating to individual peripherals for power savings
Optional output inversion of each PWM signal (polarity control)
Optional fault handling for each PWM signal
Synchronization of timers in the PWM generator blocks
Synchronization of timer/comparator updates across the PWM generator blocks
Interrupt status summary of the PWM generator blocks
Weak pull-up or pull-down resistors
2-mA, 4-mA, and 8-mA pad drive
Slew rate control for the 8-mA drive
Open drain enables
Digital input enables
Preliminary
April 27, 2007
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